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2004 Microchip Technology Inc.
Preliminary
DS39625B-page 471
PIC18F2585/2680/4585/4680
I
2
C Clock Rate w/BRG .............................................213
Master Mode ............................................................211
Operation .........................................................212
Reception .........................................................217
Repeated Start Condition Timing .....................216
Start Condition .................................................215
Transmission ...................................................217
Transmit Sequence ..........................................212
Multi-Master Communication, Bus Collision
and Arbitration .................................................221
Multi-Master Mode ...................................................221
Operation .................................................................200
Read/Write Bit Information (R/W Bit) ...............200, 201
Registers ..................................................................196
Serial Clock (RC3/SCK/SCL) ...................................201
Slave Mode ..............................................................200
Addressing .......................................................200
Reception .........................................................201
Transmission ...................................................201
Sleep Operation .......................................................221
Stop Condition Timing ..............................................220
ID Locations .............................................................343, 360
INCF .................................................................................382
INCFSZ ............................................................................383
In-Circuit Debugger ..........................................................360
In-Circuit Serial Programming (ICSP) ......................343, 360
Indexed Literal Offset Addressing Mode ..........................408
and Standard PIC18 Instructions .............................408
Indexed Literal Offset Mode .........................................91, 93
Indirect Addressing ............................................................89
INFSNZ ............................................................................383
Initialization Conditions for all Registers ......................49–60
Instruction Cycle ................................................................65
Clocking Scheme .......................................................65
Instruction Flow/Pipelining .................................................65
Instruction Set ..................................................................361
ADDLW ....................................................................367
ADDWF ....................................................................367
ADDWF (Indexed Literal Offset mode) ....................409
ADDWFC .................................................................368
ANDLW ....................................................................368
ANDWF ....................................................................369
BC ............................................................................369
BCF ..........................................................................370
BN ............................................................................370
BNC .........................................................................371
BNN .........................................................................371
BNOV .......................................................................372
BNZ ..........................................................................372
BOV .........................................................................375
BRA ..........................................................................373
BSF ..........................................................................373
BSF (Indexed Literal Offset mode) ..........................409
BTFSC .....................................................................374
BTFSS .....................................................................374
BTG ..........................................................................375
BZ ............................................................................376
CALL ........................................................................376
CLRF ........................................................................377
CLRWDT ..................................................................377
COMF ......................................................................378
CPFSEQ ..................................................................378
CPFSGT ..................................................................379
CPFSLT ...................................................................379
DAW .........................................................................380
DCFSNZ .................................................................. 381
DECF ....................................................................... 380
DECFSZ .................................................................. 381
Extended Instructions .............................................. 403
and Using MPLAB Tools ................................. 410
Considerations when Enabling ........................ 408
Syntax ............................................................. 403
General Format ....................................................... 363
GOTO ...................................................................... 382
INCF ........................................................................ 382
INCFSZ .................................................................... 383
INFSNZ .................................................................... 383
IORLW ..................................................................... 384
IORWF ..................................................................... 384
LFSR ....................................................................... 385
MOVF ...................................................................... 385
MOVFF .................................................................... 386
MOVLB .................................................................... 386
MOVLW ................................................................... 387
MOVWF ................................................................... 387
MULLW .................................................................... 388
MULWF ................................................................... 388
NEGF ....................................................................... 389
NOP ......................................................................... 389
POP ......................................................................... 390
PUSH ....................................................................... 390
RCALL ..................................................................... 391
RESET ..................................................................... 391
RETFIE .................................................................... 392
RETLW .................................................................... 392
RETURN .................................................................. 393
RLCF ....................................................................... 393
RLNCF ..................................................................... 394
RRCF ....................................................................... 394
RRNCF .................................................................... 395
SETF ....................................................................... 395
SETF (Indexed Literal Offset mode) ........................ 409
SLEEP ..................................................................... 396
Standard Instructions ............................................... 361
SUBFWB ................................................................. 396
SUBLW .................................................................... 397
SUBWF .................................................................... 397
SUBWFB ................................................................. 398
SWAPF .................................................................... 398
TBLRD ..................................................................... 399
TBLWT .................................................................... 400
TSTFSZ ................................................................... 401
XORLW ................................................................... 401
XORWF ................................................................... 402
Summary Table ....................................................... 364
INTCON Register
RBIF Bit ................................................................... 132
INTCON Registers ........................................................... 115
Inter-Integrated Circuit.
See
I
2
C.
Internal Oscillator Block ..................................................... 26
Adjustment ................................................................. 26
INTIO Modes ............................................................. 26
INTOSC Output Frequency ....................................... 26
OSCTUNE Register ................................................... 26
Internal RC Oscillator
Use with WDT .......................................................... 352
Interrupt Sources ............................................................. 343
A/D Conversion Complete ....................................... 251
Capture Complete (CCP1) ...................................... 165
Compare Complete (CCP1) .................................... 167