參數(shù)資料
型號: PIC18F4580-I/ML
廠商: Microchip Technology
文件頁數(shù): 61/88頁
文件大小: 0K
描述: IC PIC MCU FLASH 16KX16 44QFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
PIC18 J Series MCU Overview
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 45
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: CAN,I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,HLVD,POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 1.5K x 8
電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 11x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤
包裝: 管件
產(chǎn)品目錄頁面: 645 (CN2011-ZH PDF)
配用: XLT44QFN2-ND - SOCKET TRAN ICE 44QFN/40DIP
AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
444-1001-ND - DEMO BOARD FOR PICMICRO MCU
MCP2515
DS21801F-page 64
2010 Microchip Technology Inc.
Each status bit returned in this command may also be
read by using the standard read command with the
appropriate register address.
12.9
RX Status Instruction
The RX Status instruction (Figure 12-9) is used to
quickly determine which filter matched the message
and message type (standard, extended, remote). After
the command byte is sent, the controller will return
8 bits of data that contain the status data. If more clocks
are sent after the 8 bits are transmitted, the controller
will continue to output the same status bits as long as
the CS pin stays low and clocks are provided.
12.10 Bit Modify Instruction
The Bit Modify instruction provides a means for setting
or clearing individual bits in specific status and control
registers. This command is not available for all
determine which registers allow the use of this
command.
The part is selected by lowering the CS pin and the Bit
Modify command byte is then sent to the MCP2515.
The command is followed by the address of the
register, the mask byte and finally the data byte.
The mask byte determines which bits in the register will
be allowed to change. A ‘1’ in the mask byte will allow
a bit in the register to change, while a ‘0’ will not.
The data byte determines what value the modified bits
in the register will be changed to. A ‘1’ in the data byte
will set the bit and a ‘0’ will clear the bit, provided that
the mask for that bit is set to a ‘1’ (see Figure 12-7).
FIGURE 12-1:
BIT MODIFY
TABLE 12-1:
SPI INSTRUCTION SET
Note:
Executing the Bit Modify command on
registers that are not bit-modifiable will
force the mask to FFh. This will allow byte-
writes to the registers, not bit modify.
Mask byte
Data byte
Previous
Register
Contents
Resulting
Register
Contents
00 1
1
11
00
XX 1
1
00
XX
01 0
1
10
00
01 1
1
00
Instruction Name
Instruction Format
Description
RESET
1100 0000
Resets internal registers to default state, set Configuration mode.
READ
0000 0011
Read data from register beginning at selected address.
Read RX Buffer
1001 0nm0
When reading a receive buffer, reduces the overhead of a normal
read command by placing the address pointer at one of four
locations, as indicated by ‘n,m’. Note: The associated RX flag bit
(CANINTF.RXnIF) will be cleared after bringing CS high.
WRITE
0000 0010
Write data to register beginning at selected address.
Load TX Buffer
0100 0abc
When loading a transmit buffer, reduces the overhead of a normal
Write command by placing the address pointer at one of six
locations as indicated by ‘a(chǎn),b,c’.
RTS
(Message
Request-To-Send)
1000 0nnn
Instructs controller to begin message transmission sequence for
any of the transmit buffers.
Read Status
1010 0000
Quick polling command that reads several status bits for transmit
and receive functions.
RX Status
1011 0000
Quick polling command that indicates filter match and message
type (standard, extended and/or remote) of received message.
Bit Modify
0000 0101
Allows the user to set or clear individual bits in a particular
register. Note: Not all registers can be bit-modified with this
command. Executing this command on registers that are not bit-
modifiable will force the mask to FFh. See the register map in
Section 11.0 “Register Map” for a list of the registers that apply.
1000 0nnn
Request-to-send for TXBO
Request-to-send for TXB1
Request-to-send for TXB2
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