參數(shù)資料
型號: PIC18F452-E/ML
廠商: Microchip Technology
文件頁數(shù): 40/134頁
文件大?。?/td> 0K
描述: IC MCU FLASH 16KX16 A/D 44QFN
產品培訓模塊: Asynchronous Stimulus
標準包裝: 45
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 1.5K x 8
電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 8x10b
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 44-VQFN 裸露焊盤
包裝: 管件
PIC16(L)F1508/9
DS41609A-page 228
Preliminary
2011 Microchip Technology Inc.
21.6.13.3
Bus Collision During a Stop
Condition
Bus collision occurs during a Stop condition if:
a)
After the SDAx pin has been deasserted and
allowed to float high, SDAx is sampled low after
the BRG has timed out.
b)
After the SCLx pin is deasserted, SCLx is
sampled low before SDAx goes high.
The Stop condition begins with SDAx asserted low.
When SDAx is sampled low, the SCLx pin is allowed to
float. When the pin is sampled high (clock arbitration),
the Baud Rate Generator is loaded with SSPxADD and
counts down to 0. After the BRG times out, SDAx is
sampled. If SDAx is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ‘0’ (Figure 21-37). If the SCLx pin is
sampled low before SDAx is allowed to float high, a bus
collision occurs. This is another case of another master
attempting to drive a data ‘0’ (Figure 21-38).
FIGURE 21-38:
BUS COLLISION DURING A STOP CONDITION (CASE 1)
FIGURE 21-39:
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDAx
SCLx
BCLxIF
PEN
P
SSPxIF
TBRG
SDAx asserted low
SDAx sampled
low after TBRG,
set BCLxIF
’0’
SDAx
SCLx
BCLxIF
PEN
P
SSPxIF
TBRG
Assert SDAx
SCLx goes low before SDAx goes high,
set BCLxIF
’0’
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