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    參數(shù)資料
    型號(hào): PIC18F448-E/PT
    廠商: Microchip Technology
    文件頁數(shù): 52/116頁
    文件大?。?/td> 0K
    描述: IC MCU FLASH 8KX16 W/CAN 44-TQFP
    產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
    標(biāo)準(zhǔn)包裝: 160
    系列: PIC® 18F
    核心處理器: PIC
    芯體尺寸: 8-位
    速度: 40MHz
    連通性: CAN,I²C,SPI,UART/USART
    外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LVD,POR,PWM,WDT
    輸入/輸出數(shù): 33
    程序存儲(chǔ)器容量: 16KB(8K x 16)
    程序存儲(chǔ)器類型: 閃存
    EEPROM 大小: 256 x 8
    RAM 容量: 768 x 8
    電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
    振蕩器型: 外部
    工作溫度: -40°C ~ 125°C
    封裝/外殼: 44-TQFP
    包裝: 托盤
    PIC18FXX8
    DS41159E-page 38
    2006 Microchip Technology Inc.
    4.2
    Return Address Stack
    The return address stack allows any combination of up
    to 31 program calls and interrupts to occur. The PC
    (Program Counter) is pushed onto the stack when a
    PUSH
    , CALL or RCALL instruction is executed, or an
    interrupt is Acknowledged. The PC value is pulled off
    the stack on a RETURN, RETLW or a RETFIE instruc-
    tion. PCLATU and PCLATH are not affected by any of
    the RETURN instructions.
    The stack operates as a 31-word by 21-bit stack
    memory and a 5-bit Stack Pointer register, with the
    Stack Pointer initialized to 00000b after all Resets.
    There is no RAM associated with Stack Pointer
    00000b. This is only a Reset value. During a CALL type
    instruction, causing a push onto the stack, the Stack
    Pointer is first incremented and the RAM location
    pointed to by the Stack Pointer is written with the con-
    tents of the PC. During a RETURN type instruction,
    causing a pop from the stack, the contents of the RAM
    location indicated by the STKPTR are transferred to the
    PC and then the Stack Pointer is decremented.
    The stack space is not part of either program or data
    space. The Stack Pointer is readable and writable and
    the data on the top of the stack is readable and writable
    through SFR registers. Status bits indicate if the stack
    pointer is at or beyond the 31 levels provided.
    4.2.1
    TOP-OF-STACK ACCESS
    The top of the stack is readable and writable. Three
    register locations, TOSU, TOSH and TOSL allow
    access to the contents of the stack location indicated by
    the STKPTR register. This allows users to implement a
    software stack, if necessary. After a CALL, RCALL or
    interrupt, the software can read the pushed value by
    reading the TOSU, TOSH and TOSL registers. These
    values can be placed on a user defined software stack.
    At return time, the software can replace the TOSU,
    TOSH and TOSL and do a return.
    The user should disable the global interrupt enable bits
    during
    this
    time
    to
    prevent
    inadvertent
    stack
    operations.
    4.2.2
    RETURN STACK POINTER
    (STKPTR)
    The STKPTR register contains the Stack Pointer value,
    the STKFUL (Stack Full) status bit and the STKUNF
    (Stack Underflow) status bits. Register 4-1 shows the
    STKPTR register. The value of the Stack Pointer can be
    0 through 31. The Stack Pointer increments when val-
    ues are pushed onto the stack and decrements when
    values are popped off the stack. At Reset, the Stack
    Pointer value will be ‘0’. The user may read and write
    the Stack Pointer value. This feature can be used by a
    Real-Time
    Operating
    System
    for
    return
    stack
    maintenance.
    After the PC is pushed onto the stack 31 times (without
    popping any values off the stack), the STKFUL bit is
    set. The STKFUL bit can only be cleared in software or
    by a POR.
    The action that takes place when the stack becomes
    full depends on the state of the STVREN (Stack Over-
    flow
    Reset
    Enable)
    configuration
    bit.
    Refer
    to
    of the device configuration bits. If STVREN is set
    (default), the 31st push will push the (PC + 2) value
    onto the stack, set the STKFUL bit and reset the
    device. The STKFUL bit will remain set and the Stack
    Pointer will be set to ‘0’.
    If STVREN is cleared, the STKFUL bit will be set on the
    31st push and the Stack Pointer will increment to 31.
    The 32nd push will overwrite the 31st push (and so on),
    while STKPTR remains at 31.
    When the stack has been popped enough times to
    unload the stack, the next pop will return a value of zero
    to the PC and sets the STKUNF bit, while the stack
    pointer remains at ‘0’. The STKUNF bit will remain set
    until cleared in software or a POR occurs.
    Note:
    Returning a value of zero to the PC on an
    underflow has the effect of vectoring the
    program to the Reset vector, where the
    stack conditions can be verified and
    appropriate actions can be taken.
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