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參數(shù)資料
| 型號： | PIC18F442-E/ML |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 57/134頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU FLASH 8KX16 EE A/D 44QFN |
| 標(biāo)準(zhǔn)包裝： | 45 |
| 系列： | PIC® 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 34 |
| 程序存儲器容量： | 16KB（8K x 16） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 256 x 8 |
| RAM 容量： | 768 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.2 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 44-VQFN 裸露焊盤 |
| 包裝： | 管件 |
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Micrel, Inc.
KSZ8864RMN
April 2012
29
M9999-043012-1.5
The KSZ8864RMN will not forward the following packets:
1. Error Packets.
These include framing errors, Frame Check Sequence (FCS) errors, alignment errors, and illegal size packet errors.
2. IEEE802.3x PAUSE Frames.
KSZ8864RMN intercepts these packets and performs full duplex flow control accordingly.
3. "Local" Packets.
Based on destination address (DA) lookup, if the destination port from the lookup table matches the port from which
the packet originated, the packet is defined as "local."
Half-Duplex Back Pressure
The KSZ8864RMN also provides a half-duplex back pressure option (note: this is not listed in IEEE 802.3 standards). The
activation and deactivation conditions are the same as the ones given for full-duplex mode. If back pressure is required,
the KSZ8864RMN sends preambles to defer the other station's transmission (carrier sense deference). To avoid jabber
and excessive deference as defined in IEEE 802.3 standard, after a certain period of time, the KSZ8864RMN
discontinues carrier sense but raises it quickly after it drops packets to inhibit other transmissions. This short silent time
(no carrier sense) is to prevent other stations from sending out packets and keeps other stations in a carrier sense
deferred state. If the port has packets to send during a back pressure situation, the carrier-sense-type back pressure is
interrupted and those packets are transmitted instead. If there are no more packets to send, carrier-sense-type back
pressure becomes active again until switch resources are free. If a collision occurs, the binary exponential backoff
algorithm is skipped and carrier sense is generated immediately, reducing the chance of further colliding and maintaining
carrier sense to prevent reception of packets.To ensure no packet loss in 10BASE-T or 100BASE-TX half-duplex modes,
the user must enable the following:
Aggressive backoff (Register 3, bit 0)
No excessive collision drop (Register 4, bit 3)
Back pressure (Register 4, bit 5)
These bits are not set as the default because this is not the IEEE standard.
Broadcast Storm Protection
The KSZ8864RMN has an intelligent option to protect the switch system from receiving too many broadcast packets.
Broadcast packets are normally forwarded to all ports except the source port and thus use too many switch resources
(bandwidth and available space in transmit queues). The KSZ8864RMN has the option to include “multicast packets” for
storm control. The broadcast storm rate parameters are programmed globally and can be enabled or disabled on a per
port basis. The rate is based on a 50ms (0.05s) interval for 100BT and a 500ms (0.5s) interval for 10BT. At the beginning
of each interval, the counter is cleared to zeroand the rate limit mechanism starts to count the number of bytes during the
interval. The rate definition is described in Registers 6 and 7. The default setting for Registers 6 and 7 is 0x4A (74
decimal). This is equal to a rate of 1%, calculated as follows:
148,800 frames/sec X 50ms (0.05s)/interval X 1% = 74 frames/interval (approx.) = 0x4A.
MII Interface Operation
The media independent interface (MII) is specified by the IEEE 802.3 committee and provides a common interface
between physical layer and MAC layer devices. The KSZ8864RMN provides two MAC layer interfaces for MAC 3 and
MAC 4. Each of these MII/RMII interfaces contains two distinct groups of signals, one for transmission and the other for
receiving.
Switch MAC3/MAC4 SW3/SW4-MII Interface
Table 3 shows two connection manners,
1. The first is an external MAC connects to SW3/SW4-MII PHY mode.
2. The second is an external PHY connects to SW3/SW4-MII MAC mode.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PIC18F442-I/L | 功能描述:8位微控制器 -MCU 16KB 768 RAM 34I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18F442-I/L | 制造商:Microchip Technology Inc 功能描述:8BIT FLASH MCU SMD 18F442 PLCC44 |
| PIC18F442-I/ML | 功能描述:8位微控制器 -MCU 16KB 768 RAM 34I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18F442-I/P | 功能描述:8位微控制器 -MCU 16KB 768 RAM 34I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18F442-I/P | 制造商:Microchip Technology Inc 功能描述:IC 8BIT FLASH MCU 18F442 DIP40 |
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