參數(shù)資料
型號(hào): PIC18F25J10T-I/SO
廠商: Microchip Technology
文件頁數(shù): 2/80頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 16KX16 28SOIC
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝: 1
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 21
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 剪切帶 (CT)
配用: AC162074-ND - HEADER INTRFC MPLAB ICD2 44TQFP
MA180011-ND - MODULE PLUG-IN 18F25J10 28SOIC
AC162067-ND - HEADER INTRFC MPLAB ICD2 40/28P
AC164331-ND - MODULE SKT FOR 28SSOP 18F45J10
其它名稱: PIC18F25J10T-I/SOCT
PIC18F45J10 FAMILY
DS39682E-page 8
2009 Microchip Technology Inc.
1.2
Other Special Features
Communications:
The PIC18F45J10 family
incorporates a range of serial communication
peripherals, including 1 independent Enhanced
USART and 2 Master SSP modules capable of
both SPI and I2C (Master and Slave) modes of
operation. Also, one of the general purpose I/O
ports can be reconfigured as an 8-bit Parallel
Slave Port for direct processor-to-processor
communications.
Self-Programmability: These devices can write
to their own program memory spaces under
internal software control. By using a bootloader
routine, it becomes possible to create an
application that can update itself in the field.
Extended Instruction Set: The PIC18F45J10
family introduces an optional extension to the
PIC18 instruction set, which adds 8 new instruc-
tions and an Indexed Addressing mode. This
extension, enabled as a device configuration
option, has been specifically designed to optimize
re-entrant application code originally developed in
high-level languages, such as C.
Enhanced CCP module: In PWM mode, this
module provides 1, 2 or 4 modulated outputs for
controlling half-bridge and full-bridge drivers.
Other features include Auto-Shutdown, for
disabling PWM outputs on interrupt or other select
conditions and Auto-Restart, to reactivate outputs
once the condition has cleared.
Enhanced Addressable USART: This serial
communication module is capable of standard
RS-232 operation and provides support for the
LIN/J2602 protocol. Other enhancements include
automatic baud rate detection and a 16-bit Baud
Rate Generator for improved resolution.
10-bit A/D Converter: This module incorporates
programmable acquisition time, allowing for a
channel to be selected and a conversion to be
initiated without waiting for a sampling period and
thus, reduce code overhead.
Extended Watchdog Timer (WDT): This
enhanced version incorporates a 16-bit prescaler,
allowing an extended time-out range that is stable
across operating voltage and temperature. See
for
time-out periods.
1.3
Details on Individual Family
Members
Devices in the PIC18F45J10 family are available in
28-pin and 40/44-pin packages. Block diagrams for the
two groups are shown in Figure 1-1 and Figure 1-2.
The devices are differentiated from each other in five
ways:
1.
Flash
program
memory
(16 Kbytes
for
PIC18F24J10/44J10 devices and 32 Kbytes for
PIC18F25J10/45J10).
2.
A/D channels (10 for 28-pin devices, 13 for
40/44-pin devices).
3.
I/O ports (3 bidirectional ports on 28-pin devices,
5 bidirectional ports on 40/44-pin devices).
4.
CCP and Enhanced CCP implementation
(28-pin devices have 2 standard CCP mod-
ules, 40/44-pin devices have one standard CCP
module and one ECCP module).
5.
Parallel Slave Port (present only on 40/44-pin
devices).
6.
One MSSP module for PIC18F24J10/25J10
devices
and
2
MSSP
modules
for
PIC18F44J10/45J10 devices
7.
Parts designated with an “F” part number (i.e.,
PIC18F25J10) have a minimum VDD of 2.7 volts,
whereas parts designated with an “LF” part
number (i.e., PIC18LF25J10) can operate
between 2.0-3.6 volts on VDD; however,
VDDCORE should never exceed VDD.
All of the other features for devices in this family are
identical. These are summarized in Table 1-1.
The pinouts for all devices are listed in Table 1-2 and
The PIC18F45J10 family of devices provides an on-chip
voltage regulator to supply the correct voltage levels to
the core. Parts designated with an “F” part number (such
as PIC18F25J10) have the voltage regulator enabled.
These parts can run from 2.7-3.6 volts on VDD but should
have the VDDCORE pin connected to VSS through a low-
ESR capacitor. Parts designated with an “LF” part
number (such as PIC18LF24J10) do not enable the
voltage regulator. An external supply of 2.0-2.7 Volts has
to be supplied to the VDDCORE pin while 2.0-3.6 Volts
can be supplied to VDD (VDDCORE should never exceed
for more details about the internal voltage regulator.
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