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參數資料
| 型號： | PIC18F2450T-I/SO |
| 廠商： | Microchip Technology |
| 文件頁數： | 3/241頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PIC MCU FLASH 8KX16 28SOIC |
| 產品培訓模塊： | Asynchronous Stimulus |
| 標準包裝： | 1,600 |
| 系列： | PIC® 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 48MHz |
| 連通性： | UART/USART，USB |
| 外圍設備： | 欠壓檢測/復位，HLVD，POR，PWM，WDT |
| 輸入/輸出數： | 23 |
| 程序存儲器容量： | 16KB（8K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 768 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.2 V ~ 5.5 V |
| 數據轉換器： | A/D 10x10b |
| 振蕩器型： | 內部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 包裝： | 帶卷 (TR) |
| 配用： | DM163025-ND - PIC DEM FULL SPEED USB DEMO BRD |
100
XMEGA A [MANUAL]
8077I–AVR–11/2012
Table 8-1.
Active clock domains and wake-up sources in the different sleep modes.
The wake-up time for the device is dependent on the sleep mode and the main clock source. The startup time for the
system clock source must be added to the wake-up time for sleep modes where the system clock source is not kept
running. For details on the startup time for the different oscillator options, refer to “System Clock and Clock Options” on
The content of the register file, SRAM and registers are kept during sleep. If a reset occurs during sleep, the device will
reset, start up, and execute from the reset vector.
8.3.1
Idle Mode
In idle mode the CPU and nonvolatile memory are stopped (note that any ongoing programming will be completed), but
all peripherals, including the interrupt controller, event system and DMA controller are kept running. Any enabled
interrupt will wake the device.
8.3.2
Power-down Mode
In power-down mode, all clocks, including the real-time counter clock source, are stopped. This allows operation only of
asynchronous modules that do not require a running clock. The only interrupts that can wake up the MCU are the two-
wire interface address match interrupt and asynchronous port interrupts.
8.3.3
Power-save Mode
Power-save mode is identical to power down, with one exception. If the real-time counter (RTC) is enabled, it will keep
running during sleep, and the device can also wake up from either an RTC overflow or compare match interrupt.
8.3.4
Standby Mode
Standby mode is identical to power down, with the exception that the enabled system clock sources are kept running
while the CPU, peripheral, and RTC clocks are stopped. This reduces the wake-up time.
8.3.5
Extended Standby Mode
Extended standby mode is identical to power-save mode, with the exception that the enabled system clock sources are
kept running while the CPU and peripheral clocks are stopped. This reduces the wake-up time.
Active Clock Domain
Oscillators
Wake-up Sources
Sleep Modes
CPU
Clock
Periph
er
al
Cloc
k
RTC
Clock
System
Clo
ck
Sou
rce
RTC
Clo
ck
Sou
rce
Asy
n
ch
ro
no
us
Po
rt
Inte
rrupt
s
TW
IAd
dre
ss
Match
In
te
rru
pt
s
Rea
lT
ime
C
lo
ck
Inter
rup
ts
All
Interr
upt
s
Idle
X
Power down
X
Power save
X
Standby
X
Extended standby
X
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