[ label ] LSLF f {,d} Operand" />
參數(shù)資料
型號(hào): PIC18F2420-E/SP
廠商: Microchip Technology
文件頁數(shù): 90/151頁
文件大?。?/td> 0K
描述: IC MCU FLASH 8KX16 28-DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
標(biāo)準(zhǔn)包裝: 15
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 25MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,HLVD,POR,PWM,WDT
輸入/輸出數(shù): 25
程序存儲(chǔ)器容量: 16KB(8K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
配用: DVA18XP280-ND - DEVICE ADAPTER 18F2220 PDIP 28LD
2011-2012 Microchip Technology Inc.
Preliminary
DS41579C-page 357
PIC16(L)F1782/3
LSLF
Logical Left Shift
Syntax:
[ label ] LSLF
f {,d}
Operands:
0
f 127
d
[0,1]
Operation:
(f<7>)
C
(f<6:0>)
dest<7:1>
0
dest<0>
Status Affected:
C, Z
Description:
The contents of register ‘f’ are shifted
one bit to the left through the Carry flag.
A ‘0’ is shifted into the LSb. If ‘d’ is ‘0’,
the result is placed in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
LSRF
Logical Right Shift
Syntax:
[ label ] LSRF
f {,d}
Operands:
0
f 127
d
[0,1]
Operation:
0
dest<7>
(f<7:1>)
dest<6:0>,
(f<0>)
C,
Status Affected:
C, Z
Description:
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. A ‘0’ is shifted into the MSb. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
register f
0
C
register f
C
0
MOVF
Move f
Syntax:
[ label ]
MOVF f,d
Operands:
0
f 127
d
[0,1]
Operation:
(f)
(dest)
Status Affected:
Z
Description:
The contents of register f is moved to
a destination dependent upon the
status of d. If d = 0,
destination is W register. If d = 1, the
destination is file register f itself. d = 1
is useful to test a file register since
status flag Z is affected.
Words:
1
Cycles:
1
Example:
MOVF
FSR, 0
After Instruction
W = value in FSR register
Z= 1
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