
2007 Microchip Technology Inc.
DS39599G-page 13
PIC18F2220/2320/4220/4320
PORTC is a bidirectional I/O port.
RC0/T1OSO/T1CKI
RC0
T1OSO
T1CKI
11
I/O
O
I
ST
—
ST
Digital I/O.
Timer1 oscillator output.
Timer1/Timer3 external clock input.
RC1/T1OSI/CCP2
RC1
T1OSI
CCP2(2)
12
I/O
I
I/O
ST
CMOS
ST
Digital I/O.
Timer1 oscillator input.
Capture 2 input, Compare 2 output, PWM2 output.
RC2/CCP1/P1A
RC2
CCP1
P1A
13
I/O
O
ST
—
Digital I/O.
Capture 1 input/Compare 1 output/PWM1 output.
Enhanced CCP1 output.
RC3/SCK/SCL
RC3
SCK
SCL
14
I/O
ST
Digital I/O.
Synchronous serial clock input/output for SPI mode.
Synchronous serial clock input/output for I2C mode.
RC4/SDI/SDA
RC4
SDI
SDA
15
I/O
I
I/O
ST
Digital I/O.
SPI data in.
I2C data I/O.
RC5/SDO
RC5
SDO
16
I/O
O
ST
—
Digital I/O.
SPI data out.
RC6/TX/CK
RC6
TX
CK
17
I/O
O
I/O
ST
—
ST
Digital I/O.
USART asynchronous transmit.
USART synchronous clock (see related RX/DT).
RC7/RX/DT
RC7
RX
DT
18
I/O
I
I/O
ST
Digital I/O.
USART asynchronous receive.
USART synchronous data (see related TX/CK).
VSS
8, 19 8, 19
P
—
Ground reference for logic and I/O pins.
VDD
20
P
—
Positive supply for logic and I/O pins.
TABLE 1-2:
PIC18F2220/2320 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number Pin
Type
Buffer
Type
Description
PDIP SOIC
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
I
= Input
O
= Output
P
= Power
OD = Open-drain (no diode to VDD)
Note 1: Alternate assignment for CCP2 when CCP2MX is cleared.
2: Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set.