
2001 Microchip Technology Inc.
DS39026C-page 51
PIC18CXX2
If an indirect addressing operation is done where the
target address is an FSRnH or FSRnL register, the
write operation will dominate over the pre- or post-
increment/decrement functions.
FIGURE 4-9:
INDIRECT ADDRESSING OPERATION
FIGURE 4-10:
INDIRECT ADDRESSING
Opcode
Address
File Address = access of an indirect addressing register
FSR
Instruction
Executed
Instruction
Fetched
RAM
Opcode
File
12
BSR<3:0>
8
4
0h
FFFh
Note 1: For register file map detail, see
Table 4-1. Data
Memory(1)
Indirect Addressing
FSR Register
11
0
0FFFh
0000h
Location Select