參數(shù)資料
型號: PIC17LC756AT-08I/L
廠商: Microchip Technology
文件頁數(shù): 125/159頁
文件大小: 0K
描述: IC MCU OTP 16KX16 A/D 68PLCC
標(biāo)準(zhǔn)包裝: 300
系列: PIC® 17C
核心處理器: PIC
芯體尺寸: 8-位
速度: 8MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 50
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: OTP
RAM 容量: 902 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 68-LCC(J 形引線)
包裝: 帶卷 (TR)
其它名稱: PIC17LC756AT-08IL
2000 Microchip Technology Inc.
DS30289B-page 67
PIC17C7XX
9.0
HARDWARE MULTIPLIER
All PIC17C7XX devices have an 8 x 8 hardware multi-
plier included in the ALU of the device. By making the
multiply a hardware operation, it completes in a single
instruction cycle. This is an unsigned multiply that gives
a 16-bit result. The result is stored into the 16-bit
Product register (PRODH:PRODL). The multiplier does
not affect any flags in the ALUSTA register.
Making the 8 x 8 multiplier execute in a single cycle
gives the following advantages:
Higher computational throughput
Reduces code size requirements for multiply algo-
rithms
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 9-1 shows a performance comparison between
PIC17CXXX devices using the single cycle hardware
multiply and performing the same function without the
hardware multiply.
Example 9-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
Example 9-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s most significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 9-1:
8 x 8 UNSIGNED
MULTIPLY ROUTINE
EXAMPLE 9-2:
8 x 8 SIGNED MULTIPLY
ROUTINE
TABLE 9-1:
PERFORMANCE COMPARISON
MOVFP
ARG1, WREG
;
MULWF
ARG2
; ARG1 * ARG2 ->
;
PRODH:PRODL
MOVFP
ARG1, WREG
MULWF
ARG2
; ARG1 * ARG2 ->
;
PRODH:PRODL
BTFSC
ARG2, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG1
MOVFP
ARG2, WREG
BTFSC
ARG1, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG2
Routine
Multiply Method
Program
Memory
(Words)
Cycles
(Max)
Time
@ 33 MHz
@ 16 MHz
@ 8 MHz
8 x 8 unsigned
Without hardware multiply
13
69
8.364
s17.25 s
34.50
s
Hardware multiply
1
0.121
s0.25 s0.50 s
8 x 8 signed
Without hardware multiply
———
Hardware multiply
6
0.727
s1.50 s3.0 s
16 x 16 unsigned
Without hardware multiply
21
242
29.333
s60.50 s
121.0
s
Hardware multiply
24
2.91
s6.0 s
12.0
s
16 x 16 signed
Without hardware multiply
52
254
30.788
s63.50 s
127.0
s
Hardware multiply
36
4.36
s9.0 s
18.0
s
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