參數(shù)資料
型號(hào): PIC17C766T-33/L
廠商: Microchip Technology
文件頁數(shù): 92/159頁
文件大?。?/td> 0K
描述: IC MCU OTP 16KX16 A/D 84PLCC
標(biāo)準(zhǔn)包裝: 300
系列: PIC® 17C
核心處理器: PIC
芯體尺寸: 8-位
速度: 33MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 66
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: OTP
RAM 容量: 902 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 84-LCC(J 形引線)
包裝: 帶卷 (TR)
配用: AC164318-ND - MODULE SKT MPLAB PM3 84PLCC
DVA17XL841-ND - DEVICE ADAPTER FOR PIC17C762
DM173001-ND - KIT DEVELOPMENT PICDEM17
AC164027-ND - ADAPTER PICSTART PLUS 84PLCC
AC174012-ND - MODULE SKT PROMATEII 84PLCC
2000 Microchip Technology Inc.
DS30289B-page 37
PIC17C7XX
6.3
Peripheral Interrupt Request
Register1 (PIR1) and Register2
(PIR2)
These registers contains the individual flag bits for the
peripheral interrupts.
REGISTER 6-4:
PIR1 REGISTER (ADDRESS: 16h, BANK 1)
Note:
These bits will be set by the specified condi-
tion, even if the corresponding interrupt
enable bit is cleared (interrupt disabled), or
the GLINTD bit is set (all interrupts disabled).
Before enabling an interrupt, the user may
wish to clear the interrupt flag to ensure that
the program does not immediately branch to
the peripheral Interrupt Service Routine.
R/W-x
R/W-0
R-1
R-0
RBIF
TMR3IF
TMR2IF
TMR1IF
CA2IF
CA1IF
TX1IF
RC1IF
bit 7
bit 0
bit 7
RBIF: PORTB Interrupt-on-Change Flag bit
1
= One of the PORTB inputs changed (software must end the mismatch condition)
0
= None of the PORTB inputs have changed
bit 6
TMR3IF: TMR3 Interrupt Flag bit
If Capture1 is enabled (CA1/PR3 = 1):
1
= TMR3 overflowed
0
= TMR3 did not overflow
If Capture1 is disabled (CA1/PR3 = 0):
1
= TMR3 value has rolled over to 0000h from equalling the period register (PR3H:PR3L) value
0
= TMR3 value has not rolled over to 0000h from equalling the period register (PR3H:PR3L)
value
bit 5
TMR2IF: TMR2 Interrupt Flag bit
1
= TMR2 value has rolled over to 0000h from equalling the period register (PR2) value
0
= TMR2 value has not rolled over to 0000h from equalling the period register (PR2) value
bit 4
TMR1IF: TMR1 Interrupt Flag bit
If TMR1 is in 8-bit mode (T16 = 0):
1
= TMR1 value has rolled over to 0000h from equalling the period register (PR1) value
0
= TMR1 value has not rolled over to 0000h from equalling the period register (PR1) value
If Timer1 is in 16-bit mode (T16 = 1):
1
= TMR2:TMR1 value has rolled over to 0000h from equalling the period register (PR2:PR1)
value
0
= TMR2:TMR1 value has not rolled over to 0000h from equalling the period register (PR2:PR1)
value
bit 3
CA2IF: Capture2 Interrupt Flag bit
1
= Capture event occurred on RB1/CAP2 pin
0
= Capture event did not occur on RB1/CAP2 pin
bit 2
CA1IF: Capture1 Interrupt Flag bit
1
= Capture event occurred on RB0/CAP1 pin
0
= Capture event did not occur on RB0/CAP1 pin
bit 1
TX1IF: USART1 Transmit Interrupt Flag bit (state controlled by hardware)
1
= USART1 Transmit buffer is empty
0
= USART1 Transmit buffer is full
bit 0
RC1IF: USART1 Receive Interrupt Flag bit (state controlled by hardware)
1
= USART1 Receive buffer is full
0
= USART1 Receive buffer is empty
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR Reset
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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