參數(shù)資料
型號(hào)： PIC17C44T-25E/PQ
廠商： Microchip Technology
文件頁(yè)數(shù)： 68/241頁(yè)
文件大小： 0K
描述： IC MCU OTP 8KX16 PWM 44-MQFP
標(biāo)準(zhǔn)包裝： 900
系列： PIC® 17C
核心處理器： PIC
芯體尺寸： 8-位
速度： 25MHz
連通性： UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 33
程序存儲(chǔ)器容量： 16KB（8K x 16）
程序存儲(chǔ)器類型： OTP
RAM 容量： 454 x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 6 V
振蕩器型： 外部
工作溫度： -40°C ~ 125°C
封裝/外殼： 44-QFP
包裝： 帶卷 (TR)
配用： AC164316-ND - MODULE SKT MPLAB PM3 44MQFP
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PIC17C4X
DS30412C-page 16
1996 Microchip Technology Inc.
4.1.3
OSCILLATOR START-UP TIMER (OST)
The Oscillator Start-up Timer (OST) provides a 1024
oscillator cycle (1024TOSC) delay after MCLR is
detected high or a wake-up from SLEEP event occurs.
The OST time-out is invoked only for XT and LF oscilla-
tor modes on a Power-on Reset or a Wake-up from
SLEEP.
The
OST
counts
the
oscillator
pulses
on
the
OSC1/CLKIN pin. The counter only starts incrementing
after the amplitude of the signal reaches the oscillator
input thresholds. This delay allows the crystal oscillator
or resonator to stabilize before the device exits reset.
The length of time-out is a function of the crystal/reso-
nator frequency.
4.1.4
TIME-OUT SEQUENCE
On power-up the time-out sequence is as follows: First
the internal POR signal goes high when the POR trip
point is reached. If MCLR is high, then both the OST
and PWRT timers start. In general the PWRT time-out
is longer, except with low frequency crystals/resona-
tors. The total time-out also varies based on oscillator
conguration. Table 4-1 shows the times that are asso-
ciated with the oscillator conguration. Figure 4-2 and
Figure 4-3 display these time-out sequences.
If the device voltage is not within electrical specication
at the end of a time-out, the MCLR/VPP pin must be
held low until the voltage is within the device specica-
tion. The use of an external RC delay is sufcient for
many of these applications.
TABLE 4-1:
TIME-OUT IN VARIOUS
SITUATIONS
The time-out sequence begins from the rst rising edge
of MCLR.
Table 4-3 shows the reset conditions for some special
registers, while Table 4-4 shows the initialization condi-
tions for all the registers. The shaded registers (in
Table 4-4) are for all devices except the PIC17C42. In
the PIC17C42, the PRODH and PRODL registers are
general purpose RAM.
TABLE 4-2:
STATUS BITS AND THEIR
SIGNIFICANCE
TOST, as would be the case in higher frequency crys-
tals. For lower frequency crystals, (i.e., 32 kHz) TOST
would be greater.
Oscillator
Conguration
Power-up
Wake up
from
SLEEP
MCLR
Reset
XT, LF
Greater of:
96 ms or
1024TOSC
—
EC, RC
Greater of:
96 ms or
1024TOSC
——
TO
PD
Event
11
Power-on Reset, MCLR Reset during normal
operation, or CLRWDT instruction executed
10
MCLR Reset during SLEEP or interrupt wake-up
from SLEEP
01
WDT Reset during normal operation
00
WDT Reset during SLEEP
TABLE 4-3:
RESET CONDITION FOR THE PROGRAM COUNTER AND THE CPUSTA REGISTER
Event
PCH:PCL
CPUSTA
OST Active
Power-on Reset
0000h
--11 11--
Yes
MCLR Reset during normal operation
0000h
--11 11--
No
MCLR Reset during SLEEP
0000h
--11 10--
Yes (2)
WDT Reset during normal operation
0000h
--11 01--
No
WDT Reset during SLEEP (3)
0000h
--11 00--
Yes (2)
Interrupt wake-up from SLEEP
GLINTD is set
PC + 1
--11 10--
Yes (2)
GLINTD is clear
PC + 1 (1)
--10 10--
Yes (2)
Legend: u = unchanged, x = unknown, - = unimplemented read as '0'.
Note 1: On wake-up, this instruction is executed. The instruction at the appropriate interrupt vector is fetched and
then executed.
2: The OST is only active when the Oscillator is congured for XT or LF modes.
3: The Program Counter = 0, that is the device branches to the reset vector. This is different from the
mid-range devices.
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