SSPxCON2: MSSPx CONTROL REGISTER 2 (I
參數(shù)資料
型號: PIC16LF76T-I/SS
廠商: Microchip Technology
文件頁數(shù): 12/104頁
文件大?。?/td> 0K
描述: IC MCU FLASH 8KX14 A/D 28SSOP
產(chǎn)品培訓模塊: Asynchronous Stimulus
標準包裝: 2,100
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 14KB(8K x 14)
程序存儲器類型: 閃存
RAM 容量: 368 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 5x8b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
其它名稱: PIC16LF76TI/SS
PIC18F45J10 FAMILY
DS39682E-page 162
2009 Microchip Technology Inc.
REGISTER 16-5:
SSPxCON2: MSSPx CONTROL REGISTER 2 (I2C MASTER MODE)
R/W-0
GCEN
ACKSTAT
ACKDT(1)
ACKEN(2)
RCEN(2)
PEN(2)
RSEN(2)
SEN(2)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
GCEN:
General Call Enable bit
Unused in Master mode.
bit 6
ACKSTAT:
Acknowledge Status bit (Master Transmit mode only)
1
= Acknowledge was not received from slave
0
= Acknowledge was received from slave
bit 5
ACKDT:
Acknowledge Data bit (Master Receive mode only)(1)
1
= Not Acknowledge
0
= Acknowledge
bit 4
ACKEN:
Acknowledge Sequence Enable bit(2)
1
= Initiate Acknowledge sequence on SDAx and SCLx pins and transmit ACKDT data bit.
Automatically cleared by hardware.
0
= Acknowledge sequence Idle
bit 3
RCEN:
Receive Enable bit (Master Receive mode only)(2)
1
= Enables Receive mode for I2C
0
= Receive Idle
bit 2
PEN:
Stop Condition Enable bit(2)
1
= Initiate Stop condition on SDAx and SCLx pins. Automatically cleared by hardware.
0
= Stop condition Idle
bit 1
RSEN:
Repeated Start Condition Enable bit(2)
1
= Initiate Repeated Start condition on SDAx and SCLx pins. Automatically cleared by hardware.
0
= Repeated Start condition Idle
bit 0
SEN:
Start Condition Enable bit(2)
1
= Initiate Start condition on SDAx and SCLx pins. Automatically cleared by hardware.
0
= Start condition Idle
Note 1:
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of a receive.
2:
If the I2C module is active, these bits may not be set (no spooling) and the SSPxBUF may not be written
(or writes to the SSPxBUF are disabled).
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