參數(shù)資料
型號： PIC16LF721-I/SO
廠商： Microchip Technology
文件頁數(shù)： 3/135頁
文件大小： 0K
描述： MCU PIC 4K FLASH 20-SOIC
產(chǎn)品培訓(xùn)模塊： 8-bit PIC® Microcontroller Portfolio
標(biāo)準包裝： 38
系列： PIC® XLP™ 16F
核心處理器： PIC
芯體尺寸： 8-位
速度： 16MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 17
程序存儲器容量： 7KB（4K x 14）
程序存儲器類型： 閃存
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 12x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
包裝： 管件
PIC16(L)F720/721
DS41430C-page 100
Preliminary
2010-2011 Microchip Technology Inc.
13.6
Timer1 Interrupt
The Timer1 register pair (TMR1H:TMR1L) increments
to FFFFh and rolls over to 0000h. When Timer1 rolls
over, the Timer1 interrupt flag bit of the PIR1 register is
set. To enable the interrupt on rollover, you must set
these bits:
TMR1ON bit of the T1CON register
TMR1IE bit of the PIE1 register
PEIE bit of the INTCON register
GIE bit of the INTCON register
The interrupt is cleared by clearing the TMR1IF bit in
the Interrupt Service Routine.
13.7
Timer1 Operation During Sleep
Timer1 can only operate during Sleep when setup in
Asynchronous Counter mode. In this mode, the clock
source can be used to increment the counter. To set up
the timer to wake the device:
TMR1ON bit of the T1CON register must be set
TMR1IE bit of the PIE1 register must be set
PEIE bit of the INTCON register must be set
T1SYNC bit of the T1CON register must be set
TMR1CS bits of the T1CON register must be
configured
TMR1GE bit of the T1GCON register must be
configured
The device will wake-up on an overflow and execute
the next instructions. If the GIE bit of the INTCON
register is set, the device will call the Interrupt Service
Routine (0004h).
13.8
CCP Capture/Compare Time Base
The CCP module uses the TMR1H:TMR1L register
pair as the time base when operating in Capture or
Compare mode.
In Capture mode, the value in the TMR1H:TMR1L
register pair is copied into the CCPR1H:CCPR1L
register pair on a configured event.
In Compare mode, an event is triggered when the value
CCPR1H:CCPR1L register pair matches the value in
the TMR1H:TMR1L register pair. This event can be a
Special Event Trigger.
For more information, see Section 15.0 “Capture/
13.9
CCP Special Event Trigger
When the CCP is configured to trigger a special event,
the trigger will clear the TMR1H:TMR1L register pair.
This special event does not cause a Timer1 interrupt.
The CCP module may still be configured to generate a
CCP interrupt.
In this mode of operation, the CCPR1H:CCPR1L
register pair becomes the period register for Timer1.
Timer1 should be synchronized to the FOSC/4 to utilize
the Special Event Trigger. Asynchronous operation of
Timer1 can cause a Special Event Trigger to be
missed.
In the event that a write to TMR1H or TMR1L coincides
with a Special Event Trigger from the CCP, the write will
take precedence.
For more information, see Section 9.2.5 “Special
FIGURE 13-2:
TIMER1 INCREMENTING EDGE
Note:
The TMR1H:TMR1L register pair and the
TMR1IF bit should be cleared before
enabling interrupts.
T1CKI = 1
when TMR1
Enabled
T1CKI = 0
when TMR1
Enabled
Note 1: Arrows indicate counter increments.
2: In Counter mode, a falling edge must be registered by the counter prior to the first incrementing rising edge of the clock.
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PIC16LF722A-E/ML 功能描述:8位微控制器 -MCU 35 KB Flash 16 MHz Int Osc nanoWatt XLP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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