參數(shù)資料
型號: PIC16LF1527-I/MR
廠商: Microchip Technology
文件頁數(shù): 41/94頁
文件大?。?/td> 0K
描述: MCU PIC 28KB FLASH 64QFN
產(chǎn)品培訓(xùn)模塊: Configurable Logic Cell
8-bit PIC® Microcontroller Portfolio
標準包裝: 40
系列: PIC® XLP™ 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 54
程序存儲器容量: 28KB(16K x 14)
程序存儲器類型: 閃存
RAM 容量: 1.5K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 30x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 管件
207
7810C–AVR–10/12
Atmel ATmega328P [Preliminary]
21.2.1
TWI Terminology
The following definitions are frequently encountered in this section.
The PRTWI bit in “Minimizing Power Consumption” on page 40 must be written to zero to enable
the 2-wire Serial Interface.
21.2.2
Electrical Interconnection
As depicted in Figure 21-1, both bus lines are connected to the positive supply voltage through
pull-up resistors. The bus drivers of all TWI-compliant devices are open-drain or open-collector.
This implements a wired-AND function which is essential to the operation of the interface. A low
level on a TWI bus line is generated when one or more TWI devices output a zero. A high level
is output when all TWI devices tri-state their outputs, allowing the pull-up resistors to pull the line
high. Note that all AVR devices connected to the TWI bus must be powered in order to allow any
bus operation.
The number of devices that can be connected to the bus is only limited by the bus capacitance
limit of 400 pF and the 7-bit slave address space. A detailed specification of the electrical char-
acteristics of the TWI is given in “2-wire Serial Interface Characteristics” on page 311. Two
different sets of specifications are presented there, one relevant for bus speeds below 100 kHz,
and one valid for bus speeds up to 400 kHz.
Table 21-1.
TWI Terminology
Term
Description
Master
The device that initiates and terminates a transmission. The Master also generates the
SCL clock.
Slave
The device addressed by a Master.
Transmitter
The device placing data on the bus.
Receiver
The device reading data from the bus.
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