參數(shù)資料
型號： PIC16LCE625T-04E/SS
廠商： Microchip Technology
文件頁數(shù)： 81/100頁
文件大?。?/td> 0K
描述： IC MCU CMOS 2K OTP W/EEPRM20SSOP
標準包裝： 1,600
系列： PIC® 16C
核心處理器： PIC
芯體尺寸： 8-位
速度： 4MHz
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，WDT
輸入/輸出數(shù)： 13
程序存儲器容量： 3.5KB（2K x 14）
程序存儲器類型： OTP
EEPROM 大小： 128 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2.5 V ~ 5.5 V
振蕩器型： 外部
工作溫度： -40°C ~ 125°C
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
包裝： 帶卷 (TR)
其它名稱： PIC16LCE625T04ESS
1999 Microchip Technology Inc.
DS40182C-page 71
PIC16CE62X
GOTO
Unconditional Branch
Syntax:
[
label ]
GOTO k
Operands:
0
≤ k ≤ 2047
Operation:
k
→ PC<10:0>
PCLATH<4:3>
→ PC<12:11>
Status Affected:
None
Encoding:
10
1kkk
kkkk
Description:
GOTO
is an unconditional branch. The
eleven bit immediate value is loaded
into PC bits <10:0>. The upper bits of
PC are loaded from PCLATH<4:3>.
GOTO
is a two-cycle instruction.
Words:
1
Cycles:
2
Example
GOTO THERE
After Instruction
PC =
Address THERE
INCF
Increment f
Syntax:
[
label ]
INCF f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(f) + 1
→ (dest)
Status Affected:
Z
Encoding:
00
1010
dfff
ffff
Description:
The contents of register ’f’ are
incremented. If ’d’ is 0, the result is
placed in the W register. If ’d’ is 1, the
result is placed back in register ’f’.
Words:
1
Cycles:
1
Example
INCF
CNT,
1
Before Instruction
CNT
=
0xFF
Z=
0
After Instruction
CNT
=
0x00
Z=
1
INCFSZ
Increment f, Skip if 0
Syntax:
[
label ]
INCFSZ f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(f) + 1
→ (dest), skip if result = 0
Status Affected:
None
Encoding:
00
1111
dfff
ffff
Description:
The contents of register ’f’ are
incremented. If ’d’ is 0, the result is
placed in the W register. If ’d’ is 1, the
result is placed back in register ’f’.
If the result is 0, the next instruction,
which is already fetched, is discarded.
A NOP is executed instead making it a
two-cycle instruction.
Words:
1
Cycles:
1(2)
Example
HERE
INCFSZ
CNT,
1
GOTO
LOOP
CONTINUE
Before Instruction
PC
=
address HERE
After Instruction
CNT
=
CNT + 1
if CNT=
0,
PC
=
address CONTINUE
if CNT
≠
0,
PC
=
address HERE +1
IORLW
Inclusive OR Literal with W
Syntax:
[
label ]
IORLW k
Operands:
0
≤ k ≤ 255
Operation:
(W) .OR. k
→ (W)
Status Affected:
Z
Encoding:
11
1000
kkkk
Description:
The contents of the W register are
OR’ed with the eight bit literal 'k'. The
result is placed in the W register.
Words:
1
Cycles:
1
Example
IORLW
0x35
Before Instruction
W
=
0x9A
After Instruction
W=
0xBF
Z=
1
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