參數(shù)資料
型號： PIC16LCE625-04E/SS
廠商： Microchip Technology
文件頁數(shù)： 3/100頁
文件大?。?/td> 0K
描述： IC MCU CMOS 2K OTP W/EEPRM20SSOP
標準包裝： 67
系列： PIC® 16C
核心處理器： PIC
芯體尺寸： 8-位
速度： 4MHz
外圍設備： 欠壓檢測/復位，POR，WDT
輸入/輸出數(shù)： 13
程序存儲器容量： 3.5KB（2K x 14）
程序存儲器類型： OTP
EEPROM 大?。?/td> 128 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2.5 V ~ 5.5 V
振蕩器型： 外部
工作溫度： -40°C ~ 125°C
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
包裝： 管件
其它名稱： PIC16LCE62504E/SS
ENC424J600/624J600
DS39935C-page 100
2010 Microchip Technology Inc.
10.7
Multicast Collection Filter
The Multicast Collection filter checks the destination
address of incoming frames. If the Least Significant bit
(LSb) of the first byte of the destination address is set,
the frame will be accepted. This represents all Multicast
frames. If the frame has a Unicast destination, it will be
passed on to the next filter.
This filter is disabled at power-up. To enable this filter,
set MCEN (ERXFCON<1>). If the filter is disabled, all
frames will be passed on to the next lower priority filter,
regardless of destination address.
10.8
Broadcast Collection Filter
The Broadcast Collection filter checks the destination
address of incoming frames. If the destination address
is FF-FF-FF-FF-FF-FF, the frame will be accepted.
Frames matching this filter are designated as being
broadcast to all nodes that receive them. All frames
with other address values will be passed on to the next
filter.
This filter is enabled at power-up. To disable this filter,
clear BCEN (ERXFCON<0>). If the filter is disabled, all
frames will be passed on to the next lower priority filter,
regardless of destination address.
10.9
Hash Table Collection Filter
The Hash Table filter accepts frames based on their des-
tination address, and is configurable for up to 64 different
hash values. This filter allows the device to accept
frames for multiple destination addresses (without
accepting
all
Not-Me
traffic
as
described
in
). It
can also be used to accept traffic for one or more
specific Multicast groups (without accepting all Multi-
cast traffic as described in Section 10.7 “Multicast
). Note that Hash Table collisions are
possible, so applications should still verify the MAC
address of accepted frames. This filter simply reduces
the amount of incoming traffic for these applications.
The filter performs a 32-bit CRC over the six destina-
tion address bytes in the packet, using the polynomial,
4C11DB7h. From the resulting 32-bit binary number, a
6-bit value is taken from bits<28:23>. This value, in
turn, points to a location in a table formed by the Ether-
net Hash Table registers, ETH1 through ETH4. If the bit
in that location is set, the packet meets the Hash Table
filter criteria and is accepted. The specific pointer
values for each bit location in the table are shown in
An example of the Hash Table operation is shown in
Example 10-1. In this case, the destination address,
01-00-00-00-01-2C, produces a Hash Table Pointer
value of 34h, which points to bit 4 of ETH4. If this bit is
‘1’, the packet will be accepted. If this Hash Table bit is
‘0’, the packet will be passed to the next lower priority
filter.
By extension, if every bit in the Hash Table is set, the
filter criteria will always be met, so all packets will be
accepted if no higher priority filter has rejected the
packet. Similarly, clearing every bit in the Hash Table
registers means that the filter criteria will never be met,
so all packets will be passed on to the next lower
priority filter.
This filter is disabled at power-up. To enable this filter,
set HTEN (ERXFCON<15>). If the filter is disabled, all
frames will be passed on to the next lower priority filter,
regardless of destination address or Hash Table
register values.
EXAMPLE 10-1:
DERIVING A HASH TABLE
LOCATION
TABLE 10-1:
BIT ASSIGNMENTS IN HASH TABLE REGISTERS
Packet Destination Address:
01-00-00-00-01-2C (hex)
Result of CRC-32 with 4C11DB7h:
1101 1010 0000 1011 0100 0101 0111 0101
(binary)
Pointer Derived from bits<28:23> of CRC Result:
110100
(binary) or 34 (hex)
Corresponding Hash Table Location:
EHT4<4>
Register
Bit Numbers in Hash Table
15
14
13
12
11
10
987
6543
210
EHT1
0F
0E
0D
0C
0B
0A
09
08
07
06
05
04
03
02
01
00
EHT2
1F
1E
1D
1C
1B
1A
19
18
17
16
15
14
13
12
11
10
EHT3
2F
2E
2D
2C
2B
2A
29
28
27
26
25
24
23
22
21
20
EHT4
3F
3E
3D
3C
3B
3A
39
38
37
36
35
34
33
32
31
30
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參數(shù)描述
PIC16LCE625-04I/P 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16LCE625-04I/SO 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16LCE625-04I/SS 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16LCE625T-04/SO 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16LCE625T-04/SS 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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