參數(shù)資料
型號(hào): PIC16FR64
廠商: Microchip Technology Inc.
英文描述: 8-Bit CMOS FlexROM Microcontrollers(每個(gè)I/O口有25mA驅(qū)動(dòng)/吸收電流,1路捕捉/比較/PWM的微控制器)
中文描述: 8位微控制器的CMOS FlexROM(每個(gè)的I / O口有25毫安驅(qū)動(dòng)/吸收電流,1路捕捉/比較/脈寬調(diào)制的微控制器)
文件頁(yè)數(shù): 9/40頁(yè)
文件大小: 354K
代理商: PIC16FR64
1996 Microchip Technology Inc.
Advanced Information
DS30260A-page 9
PIC16FR6X
Bank 1
80h
(1)
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
0000 0000
0000 0000
81h
OPTION
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
1111 1111
82h
(1)
PCL
Program Counter's (PC) Least Significant Byte
0000 0000
0000 0000
83h
(1)
STATUS
IRP
(4)
RP1
(4)
RP0
TO
PD
Z
DC
C
0001 1xxx
000q quuu
84h
(1)
FSR
Indirect data memory address pointer
xxxx xxxx
uuuu uuuu
85h
TRISA
PORTA Data Direction Register
--11 1111
--11 1111
86h
TRISB
PORTB Data Direction Register
1111 1111
1111 1111
87h
TRISC
PORTC Data Direction Register
1111 1111
1111 1111
88h
Unimplemented
89h
Unimplemented
8Ah
(1,2)
PCLATH
Write Buffer for the upper 5 bits of the Program Counter
---0 0000
---0 0000
8Bh
(1)
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
8Ch
PIE1
(5)
(5)
SSPIE
CCP1IE
TMR2IE
TMR1IE
00-- 0000
00-- 0000
8Dh
Unimplemented
8Eh
PCON
POR
BOR
---- --qq
---- --uu
8Fh
Unimplemented
90h
Unimplemented
91h
Unimplemented
92h
PR2
Timer2 Period Register
1111 1111
1111 1111
93h
SSPADD
Synchronous Serial Port (I
2
C mode) Address Register
0000 0000
0000 0000
94h
SSPSTAT
D/A
P
S
R/W
UA
BF
--00 0000
--00 0000
95h-9Fh
Legend:
x
= unknown,
u
= unchanged,
q
= value depends on condition,
-
= unimplemented location read as '0'.
Shaded locations are unimplemented, read as ‘0’.
Note 1:
These registers can be addressed from either bank.
2:
The upper byte of the Program Counter (PC) is not directly accessible. PCLATH is a holding register for the PC whose con-
tents are transferred to the upper byte of the program counter. (PC<12:8>)
3:
Other (non power-up) resets include external reset through MCLR and the Watchdog Timer reset.
4:
The IRP and RP1 bits are reserved on the PIC16FR62A, always maintain these bits clear.
5:
PIE1<7:6> and PIR1<7:6> are reserved, always maintain these bits clear.
Unimplemented
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR
BOR
Value on
all other
resets
(3)
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