Module: MSSP (I2C Slave Mo" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC16F886-E/SS
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 13/16闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC PIC MCU FLASH 8KX14 28SSOP
鐢�(ch菐n)鍝佸煿瑷撴ā濉婏細 Asynchronous Stimulus
妯欐簴鍖呰锛� 47
绯诲垪锛� PIC® 16F
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 20MHz
閫i€氭€э細 I²C锛孲PI锛孶ART/USART
澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 24
绋嬪簭瀛樺劜鍣ㄥ閲忥細 14KB锛�8K x 14锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶�?銆�?/td> 256 x 8
RAM 瀹归噺锛� 368 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 11x10b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 125°C
灏佽/澶栨锛� 28-SSOP锛�0.209"锛�5.30mm 瀵級
鍖呰锛� 绠′欢
閰嶇敤锛� DM164123-ND - KIT MANAGEMENT SYSTEM PICDEM
PIC16F88X
DS80302F-page 6
2009 Microchip Technology Inc.
5.
Module: MSSP (I2C Slave Mode)
When the master device wants to terminate
receiving any more data from the slave device, it
will do so by sending a NACK in response to the
last data byte received from the slave. When the
slave receives the NACK, the R/W bit of the
SSPSTAT register remains set improperly.
Work around
Use the CKP bit of the SSPCON register to
determine when the master has responded with a
NACK. The CKP bit will be clear when the
response is an ACK, and set when the response is
a NACK. The CKP bit is automatically cleared to
stretch the clock when the master responds to
received data with an ACK. This gives the slave
time to load the SSPBUF register before setting
the CKP bit to release the clock stretching. When
the master responds to received data with a NACK
the CKP bit properly remains set, and there is no
clock stretching.
Affected Silicon Revisions
PIC16F882
PIC16F883/PIC16F884
PIC16F886/PIC16F887
A0
X
A0
X
A2
X
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
PIC16F883T-I/ML IC PIC MCU FLASH 4KX14 28QFN
VI-23K-IX-S CONVERTER MOD DC/DC 40V 75W
132627-000 CONN PIN COAX D-602-44CS1024
PIC16C622A-40/SO IC MCU OTP 2KX14 COMP 18SOIC
PIC16C55A-40/SP IC MCU OTP 512X12 28DIP
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
PIC16F886-I/ML 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 14KB Flash 368 RAM 25 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC16F886-I/ML 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪:8-Bit Microcontroller IC
PIC16F886-I/SO 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 14KB Flash 368 RAM 25 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC16F886-I/SO 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪:8-Bit Microcontroller IC
PIC16F886-I/SP 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 14KB Flash 368 RAM 25 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT