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15. TWI 鈥� Two Wire Interface
15.1
Features
Phillips I2C compatible
SMBus compatible (with reservations)
Simple Yet Powerful and Flexible Communication Interface, only two Bus Lines Needed
Both Master and Slave Operation Supported
Device can Operate as Transmitter or Receiver
7-bit Address Space Allows up to 128 Different Slave Addresses
Multi-master Arbitration Support
Data Transfer Speed Up to 400 kHz in Slave Mode
Slew-rate Limited Output Drivers
Noise Suppression Circuitry Rejects Spikes on Bus Lines
Fully Programmable Slave Address with General Call Support
Address Recognition Causes Wake-up When AVR is in Sleep Mode
15.2
Overview
The Two Wire Interface (TWI) is a bi-directional, bus communication interface, which uses only
two wires. The TWI is I
2C compatible and, with reservations, SMBus compatible (see 鈥淐ompati-
A device connected to the bus must act as a master or slave.The master initiates a data transac-
tion by addressing a slave on the bus, and telling whether it wants to transmit or receive data.
One bus can have several masters, and an arbitration process handles priority if two or more
masters try to transmit at the same time.
15.3
Bus Definitions
The Two-Wire Serial Interface (TWI) is ideally suited for typical microcontroller applications. The
TWI protocol allows the systems designer to interconnect up to 128 different devices using only
two bi-directional bus lines, one for clock (SCL) and one for data (SDA). The only external hard-
ware needed to implement the bus is a single pull-up resistor for each of the TWI bus lines. All
devices connected to the bus have individual addresses, and mechanisms for resolving bus
contention are inherent in the TWI protocol.
Figure 15-1. TWI Bus Interconnection
Device 1
Device 2
Device 3
Device n
SDA
SCL
........
R1
R2
V
CC
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