參數(shù)資料
型號: PIC16F72-I/ML
廠商: Microchip Technology
文件頁數(shù): 47/136頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 2KX14 28-QFN
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 61
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x8b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-VQFN 裸露焊盤
包裝: 管件
產(chǎn)品目錄頁面: 639 (CN2011-ZH PDF)
配用: AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
其它名稱: PIC16F72-I/MLR
PIC16F72-I/MLR-ND
PIC16F72
DS39597C-page 16
2007 Microchip Technology Inc.
2.2.2.5
PIR1 Register
This register contains the individual flag bits for the
Peripheral interrupts.
REGISTER 2-5:
PIR1: PERIPHERAL INTERRUPT FLAG REGISTER 1 (ADDRESS 0Ch)
U-0
R/W-0
U-0
R/W-0
—ADIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
bit 7
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6
ADIF: A/D Converter Interrupt Flag bit
1
= An A/D conversion completed
0
= The A/D conversion is not complete
bit 5-4
Unimplemented: Read as ‘0’
bit 3
SSPIF: Synchronous Serial Port (SSP) Interrupt Flag bit
1
= The SSP interrupt condition has occurred, and must be cleared in software before returning
from the Interrupt Service Routine.
The conditions that will set this bit are a transmission/reception has taken place.
0
= No SSP interrupt condition has occurred
bit 2
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1
= A TMR1 register capture occurred (must be cleared in software)
0
= No TMR1 register capture occurred
Compare mode:
1
= A TMR1 register compare match occurred (must be cleared in software)
0
= No TMR1 register compare match occurred
PWM mode:
Unused in this mode
bit 1
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1
= TMR2 to PR2 match occurred (must be cleared in software)
0
= No TMR2 to PR2 match occurred
bit 0
TMR1IF: TMR1 Overflow Interrupt Flag bit
1
= TMR1 register overflowed (must be cleared in software)
0
= TMR1 register did not overflow
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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