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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | PIC16F716T-I/SS |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 123/136闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC PIC MCU FLASH 2KX14 20SSOP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Asynchronous Stimulus |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1,600 |
| 绯诲垪锛� | PIC® 16F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 20MHz |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯(c猫)/寰�(f霉)浣嶏紝POR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 13 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 3.5KB锛�2K x 14锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 128 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 4x8b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 20-SSOP锛�0.209"锛�5.30mm 瀵級 |
| 鍖呰锛� | 甯跺嵎 (TR) |
| 閰嶇敤锛� | I3-DB16F716-ND - BOARD DAUGHTER ICEPIC3 AC162054-ND - HEADER INTERFACE ICD2 16F716 |
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2007 Microchip Technology Inc.
DS41206B-page 85
PIC16F716
SUBWF
Subtract W from f
Syntax:
[ label ] SUBWF f,d
Operands:
0
鈮� f 鈮� 127
d
鈭� [0,1]
Operation:
(f) - (W)
鈫� (destination)
Status Affected: C, DC, Z
Description:
Subtract (2鈥檚 complement method)
W register from register 鈥榝鈥�. If 鈥榙鈥� is
鈥�0鈥�, the result is stored in the W
register. If 鈥榙鈥� is 鈥�1鈥�, the result is
stored back in register 鈥榝.
SWAPF
Swap Nibbles in f
Syntax:
[ label ] SWAPF f,d
Operands:
0
鈮� f 鈮� 127
d
鈭� [0,1]
Operation:
(f<3:0>)
鈫� (destination<7:4>),
(f<7:4>)
鈫� (destination<3:0>)
Status Affected:
None
Description:
The upper and lower nibbles of
register 鈥榝鈥� are exchanged. If 鈥榙鈥� is
鈥�0鈥�, the result is placed in the W
register. If 鈥榙鈥� is 鈥�1鈥�, the result is
placed in register 鈥榝鈥�.
C = 0
W
> f
C = 1
W
鈮� f
DC = 0
W<3:0>
> f<3:0>
DC = 1
W<3:0>
鈮� f<3:0>
XORLW
Exclusive OR literal with W
Syntax:
[ label ] XORLW k
Operands:
0
鈮� k 鈮� 255
Operation:
(W) .XOR. k
鈫� (W)
Status Affected:
Z
Description:
The contents of the W register
are XOR鈥檈d with the eight-bit
literal 鈥榢鈥�. The result is placed in
the W register.
XORWF
Exclusive OR W with f
Syntax:
[ label ] XORWF f,d
Operands:
0
鈮� f 鈮� 127
d
鈭� [0,1]
Operation:
(W) .XOR. (f)
鈫� (destination)
Status Affected:
Z
Description:
Exclusive OR the contents of the
W register with register 鈥榝鈥�. If 鈥榙鈥� is
鈥�0鈥�, the result is stored in the W
register. If 鈥榙鈥� is 鈥�1鈥�, the result is
stored back in register 鈥榝鈥�.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| PIC16HV540-20/SS | IC MCU OTP 512X12 20SSOP |
| VE-2WK-IX-S | CONVERTER MOD DC/DC 40V 75W |
| V300C48M75B3 | CONVERTER MOD DC/DC 48V 75W |
| VE-2WJ-IX-S | CONVERTER MOD DC/DC 36V 75W |
| VE-2WF-IX-S | CONVERTER MOD DC/DC 72V 75W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16F72 | 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪: |
| PIC16F720-E/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5 KB FLASH 128 B SRAM, 18 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F720-E/P | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5 KB FLASH 128 B SRAM, 18 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F720-E/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5 KB FLASH 128 B SRAM, 18 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F720-E/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5 KB FLASH 128 B SRAM, 18 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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