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  • 參數(shù)資料
    型號: PIC16F676-I/ST
    廠商: Microchip Technology
    文件頁數(shù): 66/132頁
    文件大?。?/td> 0K
    描述: IC MCU FLASH 1K W/AD 14-TSSOP
    產品培訓模塊: Asynchronous Stimulus
    8-bit PIC® Microcontroller Portfolio
    標準包裝: 96
    系列: PIC® 16F
    核心處理器: PIC
    芯體尺寸: 8-位
    速度: 20MHz
    外圍設備: 欠壓檢測/復位,POR,WDT
    輸入/輸出數(shù): 12
    程序存儲器容量: 1.75KB(1K x 14)
    程序存儲器類型: 閃存
    EEPROM 大?。?/td> 128 x 8
    RAM 容量: 64 x 8
    電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
    數(shù)據(jù)轉換器: A/D 8x10b
    振蕩器型: 內部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
    包裝: 管件
    產品目錄頁面: 638 (CN2011-ZH PDF)
    配用: XLT20SS-1-ND - SOCKET TRANSITION 18DIP 20SSOP
    XLT14SS-1-ND - SOCKET TRANSITION 14DIP/14SSOP
    2010 Microchip Technology Inc.
    DS40039F-page 39
    PIC16F630/676
    6.0
    COMPARATOR MODULE
    The PIC16F630/676 devices have one analog compar-
    ator. The inputs to the comparator are multiplexed with
    the RA0 and RA1 pins. There is an on-chip Comparator
    Voltage Reference that can also be applied to an input
    of the comparator. In addition, RA2 can be configured
    as the comparator output. The Comparator Control
    Register (CMCON), shown in Register 6-1, contains
    the bits to control the comparator.
    REGISTER 6-1:
    CMCON — COMPARATOR CONTROL REGISTER (ADDRESS: 19h)
    U-0
    R-0
    U-0
    R/W-0
    —COUT
    CINV
    CIS
    CM2
    CM1
    CM0
    bit 7
    bit 0
    bit 7
    Unimplemented: Read as ‘0’
    bit 6
    COUT: Comparator Output bit
    When CINV = 0:
    1 = VIN+ > VIN-
    0 = VIN+ < VIN-
    When CINV = 1:
    1 = VIN+ < VIN-
    0 = VIN+ > VIN-
    bit 5
    Unimplemented: Read as ‘0’
    bit 4
    CINV: Comparator Output Inversion bit
    1 = Output inverted
    0 = Output not inverted
    bit 3
    CIS: Comparator Input Switch bit
    When CM2:CM0 = 110 or 101:
    1 = VIN- connects to CIN+
    0 = VIN- connects to CIN-
    bit 2-0
    CM2:CM0: Comparator Mode bits
    Figure 6-2 shows the Comparator modes and CM2:CM0 bit settings
    Legend:
    R = Readable bit
    W = Writable bit
    U = Unimplemented bit, read as ‘0’
    - n = Value at POR
    ‘1’ = Bit is set
    ‘0’ = Bit is cleared
    x = Bit is unknown
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