參數(shù)資料
型號: PIC16F627-04/SO
廠商: Microchip Technology
文件頁數(shù): 130/170頁
文件大?。?/td> 0K
描述: IC MCU FLASH 1KX14 COMP 18SOIC
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 42
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
連通性: UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 1.75KB(1K x 14)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 128 x 8
RAM 容量: 224 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 18-SOIC(0.295",7.50mm 寬)
包裝: 管件
配用: XLT18SO-1-ND - SOCKET TRANSITION 18SOIC 300MIL
AC164010-ND - MODULE SKT PROMATEII DIP/SOIC
PIC16F62X
DS40300C-page 60
Preliminary
2003 Microchip Technology Inc.
EXAMPLE 10-1:
VOLTAGE REFERENCE
CONFIGURATION
10.2
Voltage Reference Accuracy/Error
The full range of V
SS to VDD cannot be realized due to
the construction of the module. The transistors on the
top and bottom of the resistor ladder network
REF from approaching VSS or VDD.
The Voltage Reference is VDD derived and therefore,
the VREF output changes with fluctuations in VDD. The
tested absolute accuracy of the Voltage Reference can
be found in Table 17-2.
10.3
Operation During SLEEP
When the device wakes-up from SLEEP through an
interrupt or a Watchdog Timer timeout, the contents of
the VRCON register are not affected. To minimize
current consumption in SLEEP mode, the Voltage
Reference should be disabled.
10.4
Effects of a RESET
A device RESET disables the Voltage Reference by
clearing bit V
REN (VRCON<7>). This RESET also
disconnects the reference from the RA2 pin by clearing
bit V
ROE (VRCON<6>) and selects the high voltage
range by clearing bit V
RR (VRCON<5>). The VREF
value select bits, VRCON<3:0>, are also cleared.
10.5
Connection Considerations
The
Voltage
Reference
module
operates
independently of the Comparator module. The output
of the reference generator may be connected to the
RA2 pin if the TRISA<2> bit is set and the V
ROE bit,
VRCON<6>, is set. Enabling the Voltage Reference
output onto the RA2 pin with an input signal present will
increase current consumption. Connecting RA2 as a
digital output with V
REF enabled will also increase
current consumption.
The RA2 pin can be used as a simple D/A output with
limited drive capability. Due to the limited drive
capability, a buffer must be used in conjunction with the
Voltage Reference output for external connections to
V
REF. Figure 10-2 shows an example buffering
technique.
FIGURE 10-2:
VOLTAGE REFERENCE OUTPUT BUFFER EXAMPLE
TABLE 10-1:
REGISTERS ASSOCIATED WITH VOLTAGE REFERENCE
MOVLW
0x02
; 4 Inputs Muxed
MOVWF
CMCON
; to 2 comps.
BSF
STATUS,RP0
; go to Bank 1
MOVLW
0x07
; RA3-RA0 are
MOVWF
TRISA
; outputs
MOVLW
0xA6
; enable VREF
MOVWF
VRCON
; low range
; set VR<3:0>=6
BCF
STATUS,RP0
; go to Bank 0
CALL
DELAY10
; 10
s delay
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value On
POR
Value On
All Other
RESETS
9Fh
VRCON
VREN
VROE
VRR
—VR3
VR2
VR1
VR0
000- 0000
1Fh
CMCON
C2OUT
C1OUT
C2INV
C1INV
CIS
CM2
CM1
CM0
0000 0000
85h
TRISA
TRISA7 TRISA6 TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
1111 1111
Note 1: — = Unimplemented, read as ‘0’.
Note
1: R is dependent upon the Voltage Reference Configuration VRCON<3:0> and VRCON<5>.
V
REF
Module
R(1)
Voltage
Reference
Output
Impedance
RA2
V
REF Output
+
Op Amp
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