參數(shù)資料
型號： PIC16F526T-I/MG
廠商： Microchip Technology
文件頁數(shù)： 25/122頁
文件大?。?/td> 0K
描述： MCU PIC 1.5K FLASH 3X3 16QFN
標準包裝： 3,300
系列： PIC® 16F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 11
程序存儲器容量： 1.5KB（1K x 12）
程序存儲器類型： 閃存
RAM 容量： 67 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 3x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 16-VFQFN 裸露焊盤
包裝： 帶卷 (TR)
PIC18F2221/2321/4221/4321 FAMILY
DS39689F-page 120
2009 Microchip Technology Inc.
11.4
PORTD, TRISD and LATD
Registers
PORTD is an 8-bit wide, bidirectional port. The
corresponding Data Direction register is TRISD. Set-
ting a TRISD bit (= 1) will make the corresponding
PORTD pin an input (i.e., put the corresponding output
driver in a High-Impedance mode). Clearing a TRISD
bit (= 0) will make the corresponding PORTD pin an
output (i.e., put the contents of the output latch on the
selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt Trigger
input buffers. Each pin is individually configurable as an
input or output.
Three of the PORTD pins are multiplexed with outputs
P1B, P1C and P1D of the Enhanced CCP module. The
operation of these additional PWM output pins is
covered in greater detail in Section 17.0 “Enhanced
PORTD can also be configured as an 8-bit wide micro-
processor port (Parallel Slave Port) by setting control
bit, PSPMODE (TRISE<4>). In this mode, the input
buffers are TTL. See Section 11.6 “Parallel Slave
Port” for additional information on the Parallel Slave
Port (PSP).
EXAMPLE 11-4:
INITIALIZING PORTD
Note:
PORTD is only available on 40/44-pin
devices.
Note:
On a Power-on Reset, these pins are
configured as digital inputs.
Note:
When the Enhanced PWM mode is used
with either dual or quad outputs, the PSP
functions of PORTD are automatically
disabled.
CLRF
PORTD
; Initialize PORTD by
; clearing output
; data latches
CLRF
LATD
; Alternate method
; to clear output
; data latches
MOVLW
0CFh
; Value used to
; initialize data
; direction
MOVWF
TRISD
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
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