
8201, 8202, 8203, 8204 Acceleration Processor Data Sheet, DS-0157-05
Page 163
Exar Confidential
6.2.15
Channel Manager 0-1 Error Status Register
If a 820x Channel Manager detects an error, the 820x will set the appropriate bit in this
register. The Host may read the Channel Manager Error Status register to determine the
source of the error. This information may also be read from the entry in the result ring.
Because the Channel Managers continue to process commands after an error, the error bits
in this register may be overwritten. It is recommended that the host validates the error bit
with the result ring error from the command.
Type:
Read/Write to clear
Offset
x‘0260’
Channel Manager 0 error status
x‘0264’
Channel Manager 1 error status
CM_DCRC
CM_KCRC
CM_ECC
Reserved
PAD_ERR
PAD_CFG_ERR
PAD_MALFORM-ERR
AES_RV_ERR
AES_AU_ERR
AES_CFG_ERR
AES_MALFORM_ERR
HASH_RV_ERR
HASH_MAC_ERR
HASH_CFG_ERR
HASH_MALFORM_ERR
GZIP_DECODE_ERR[5:0]
GZIP_RCRC_ERR
GZIP_RV_ERR
GZIP_CFG_ERR
GZIP_MALFORM_ERR
LZS_ECC_ERR
LZS_TERR
LZS_DERR
LZS_RCRC_ERR
LZS_RV_ERR
LZS_CFG_ERR
LZS_MALFORM_ERR
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876543210
Field Name
Bits
Reset
Description
CM_DCRC
31
0
Channel Manager Data CRC error.
0
Channel Manager did not detect data CRC error
1
Channel Manager detected data CRC error
CM_KCRC
30
0
Channel Manager Key CRC error.
0
Channel Manager did not detect key CRC error
1
Channel Manager detected key CRC error
CM_ECC
29
0
Channel Manager ECC/Parity error.
0
Channel Manager did not detect
ECC/Parity
error on this channel
1
Channel Manager detected ECC/Parity error
on this channel
Reserved
28
0
Reserved.
PAD_ERR
27
0
Pad Engine Padding Error.
0
Pad Engine did not detect
padding error
1
Pad Engine
detected padding error