參數(shù)資料
型號： PIC16CR77
廠商： Microchip Technology Inc.
英文描述： 28/40-Pin, 8-Bit CMOS ROM Microcontrollers
中文描述： 28/40-Pin，8位微控制器的CMOS光盤
文件頁數(shù)： 164/172頁
文件大?。?/td> 1506K
代理商： PIC16CR77
PIC18FXXXX
DS21993C-page 162
2007 Microchip Technology Inc.
Computed GOTO................................................................26
Configuration Bits................................................................89
Continuous Receive Enable (CREN Bit).............................70
Conversion Considerations...............................................160
Customer Change Notification Service .............................167
Customer Notification Service...........................................167
Customer Support.............................................................167
D
D/A bit .................................................................................60
Data Memory.......................................................................13
Bank Select (RP1:RP0 Bits) .......................................13
General Purpose Registers.........................................13
Register File Map, PIC16CR74/73..............................15
Register File Map, PIC16CR77/76..............................14
Special Function Registers .........................................16
Data/Address bit (D/A)........................................................60
DC and AC Characteristics
Graphs and Tables ...................................................139
DC Characteristics............................................................119
Development Support .......................................................113
Device Differences............................................................159
Device Overview ...................................................................5
Features........................................................................5
Direct Addressing................................................................27
E
Electrical Characteristics...................................................117
Errata ....................................................................................4
External Clock Input (RA4/T0CKI).
See
Timer0
External Interrupt Input (RB0/INT).
See
Interrupt Sources
F
Firmware Instructions........................................................105
FSR Register.......................................................................27
I
I/O Ports..............................................................................31
I
2
C Mode
Addressing..................................................................66
Associated Registers ..................................................68
Master Mode...............................................................68
Mode Selection ...........................................................65
Multi-Master Mode ......................................................68
Operation ....................................................................65
Reception....................................................................66
Slave Mode
SCL and SDA pins..............................................65
Transmission...............................................................67
ID Locations......................................................................103
INDF Register .....................................................................27
Indirect Addressing .............................................................27
FSR Register ..............................................................13
Instruction Format.............................................................105
Instruction Set...................................................................105
ADDLW.....................................................................107
ADDWF.....................................................................107
ANDLW.....................................................................107
ANDWF.....................................................................107
BCF...........................................................................107
BSF...........................................................................107
BTFSC ......................................................................107
BTFSS ......................................................................107
CALL.........................................................................108
CLRF.........................................................................108
CLRW .......................................................................108
CLRWDT .................................................................. 108
COMF....................................................................... 108
DECF........................................................................ 108
DECFSZ ................................................................... 109
GOTO....................................................................... 109
INCF ......................................................................... 109
INCFSZ..................................................................... 109
IORLW...................................................................... 109
IORWF...................................................................... 109
RETURN........................................................... 110, 111
RLF........................................................................... 111
RRF .................................................................. 110, 111
SLEEP.............................................................. 110, 111
SUBLW............................................................. 110, 111
SUBWF............................................................. 110, 111
SWAPF..................................................................... 112
XORLW .................................................................... 112
XORWF .................................................................... 112
Summary Table ........................................................ 106
INT Interrupt (RB0/INT).
See
Interrupt Sources
INTCON Register................................................................ 21
GIE Bit ........................................................................ 21
INTE Bit ...................................................................... 21
INTF Bit ...................................................................... 21
RBIF Bit ................................................................ 21, 33
TMR0IE Bit ................................................................. 21
Inter-Integrated Circuit (I
2
C).
See
I
2
C Mode
Internet Address ............................................................... 167
Interrupt Sources.......................................................... 89, 99
Interrupt-on-Change (RB7:RB4)................................. 33
RB0/INT Pin, External..................................... 8, 11, 100
TMR0 Overflow......................................................... 100
USART Receive/Transmit Complete.......................... 69
Interrupts
Synchronous Serial Port Interrupt............................... 23
Interrupts, Context Saving During..................................... 100
Interrupts, Enable Bits
Global Interrupt Enable (GIE Bit).......................... 21, 99
Interrupt-on-Change (RB7:RB4) Enable (RBIE Bit).. 100
RB0/INT Enable (INTE Bit)......................................... 21
TMR0 Overflow Enable (TMR0IE Bit)......................... 21
Interrupts, Flag Bits
Interrupt-on Change (RB7:RB4) Flag (RBIF Bit) ........ 21
Interrupt-on-Change (RB7:RB4) Flag
(RBIF Bit)............................................. 21, 33, 100
RB0/INT Flag (INTF Bit) ............................................. 21
TMR0 Overflow Flag (TMR0IF Bit)........................... 100
L
Load Conditions................................................................ 123
Loading of PC..................................................................... 26
M
Master Clear (MCLR)............................................................ 8
MCLR Reset, Normal Operation..................... 93, 95, 96
MCLR Reset, SLEEP...................................... 93, 95, 96
Operation and ESD Protection ................................... 94
MCLR Pin ........................................................................... 10
MCLR/V
PP
Pin ...................................................................... 8
Memory Organization ......................................................... 13
Data Memory.............................................................. 13
Program Memory........................................................ 13
Program Memory and Stack Maps............................. 13
Microchip Internet Web Site.............................................. 167
MPLAB ASM30 Assembler, Linker, Librarian................... 114
MPLAB ICD 2 In-Circuit Debugger................................... 115
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