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| 型號： | PIC16CE624-30/SS |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 5/100頁 |
| 文件大小： | 0K |
| 描述： | IC MCU OTP 1KX14 EE COMP 20SSOP |
| 標(biāo)準(zhǔn)包裝： | 67 |
| 系列： | PIC® 16C |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 30MHz |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，WDT |
| 輸入/輸出數(shù)： | 13 |
| 程序存儲器容量： | 1.75KB（1K x 14） |
| 程序存儲器類型： | OTP |
| EEPROM 大?。?/td> | 128 x 8 |
| RAM 容量： | 96 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 振蕩器型： | 外部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | PIC16CE62430/SS |
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ENC424J600/624J600
DS39935C-page 102
2010 Microchip Technology Inc.
10.11 Pattern Match Collection Filter
The Pattern Match filter accepts frames that match or
do not match a specific pattern. This filter is useful for
accepting
frames
that
contain
expected
data
sequences.
Pattern matching is accomplished by choosing a 64-byte
window within the first 128 bytes of a frame, then
selecting some or all of those bytes for a checksum
calculation. The checksum algorithm is the same as the
TCP/IP checksum calculation described in Section 14.2
. This checksum is then com-
pared to the EPMCS register and the result is optionally
negated by the NOTPM (ERXFCON<12>) flag.
The Pattern Match filter’s control bits, PMEN<3:0>
(ERXFCON<11:8>), differ from all other filters in that
there are multiple options. The output of the above
match can be ANDed with several other conditions.
This adds significant flexibility to the filter as it can
require both a Pattern Match (or non-match) and other
criteria (such as a Broadcast frame or Hash Table
match).
To use the Pattern Match filter, the host controller must
first program the Pattern Match Offset (EPMO) to
select the 64-byte window to be used. Setting this
register to 0000h selects the first 64 bytes of the frame,
beginning with the first byte of the destination address.
Setting 0006h selects byte numbers, 6 through 69,
beginning with the first byte of the source address. This
window must fall within the first 128 bytes of a frame;
the offset value of 1 is not supported, thus, the valid
values for EPMO are 0, 2-63.
Note that if the frame length is short enough so that the
entire window would not exist in the frame, the filter will
automatically fail to match. This is true even if the
corresponding mask bits are all ‘0’.
Then, the host must select the Pattern Match mask
bytes by using the EPMM registers. Within this 64-byte
window, each byte can be selectively included or
excluded from the checksum computation by setting or
clearing the respective bit in the Pattern Match mask. A
bit set to ‘1’ indicates that the byte is to be included. Data
bytes with corresponding mask bits set to ‘0’ are
completely removed for the purpose of the checksum
calculation (as opposed to treating the data bytes as
zero).
Next, write the expected checksum to the EPMCS reg-
ister. To select frames that match the checksum, clear
NOTPM (ERXFCON<12>). To select only frames that
fail to match the checksum, set NOTPM to ‘1’. Finally,
set the PMEN bits to ‘0001b’ to require only the Pattern
Match criteria, or one of the other values to add
additional conditions.
For example, to filter all frames having a particular
source MAC address of 00-04-A3-FF-FF-FF:
1.
Program the Pattern Match offset to 0000h.
2.
Set bits, 6-11, of EPMM1 (assuming all other
mask bits are ‘0’).
3.
Program the EPMCS register with a checksum
value of 5BFCh.
4.
Clear NOTPM to require an exact match.
Note that the offset is not programmed to 0006h and the
EPMM1<5:0> bits are not set; the checksum would still
be 5BFCh. However, in this second case, frames less
than 70 bytes would never meet the Pattern Match
criteria because there would not be a complete 64-byte
window beginning at offset position, 0006h. Another
example of a Pattern Match filter is illustrated in
The Pattern Match Collection filter is disabled at
power-up. Because this filter has the lowest priority of
all receive filters, if this filter is disabled or the packet
does not meet the configured Pattern Match criteria,
the packet is automatically discarded.
10.12 Promiscuous Mode
To accept all incoming frames regardless of content
(Promiscuous mode), set the CRCEN, RUNTEN, UCEN,
NOTMEEN and MCEN bits. Disable all other filters.
To accept absolutely all recognizable Ethernet frames,
including
those
with
errors,
set
PASSALL
(MACCON1<1>) to ‘1’ and set UCEN, NOTMEEN and
MCEN in ERXFCON.
In any mode, frames which cannot fit in the receive
buffer, or would cause the PKTCNT field (ESTAT<7:0>)
to overflow, are still discarded.
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| PIC16CE624T-04/SO | 功能描述:8位微控制器 -MCU 4MHz 1K EPRM/128 EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16CE624T-04/SS | 功能描述:8位微控制器 -MCU 1.75KB 96 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16CE624T-04E/SO | 功能描述:8位微控制器 -MCU 1.75KB 96 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16CE624T-04E/SS | 功能描述:8位微控制器 -MCU 1.75KB 96 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16CE624T-04I/SO | 功能描述:8位微控制器 -MCU 1.75KB 96 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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