參數(shù)資料
型號: PIC16CE624-30/P
廠商: Microchip Technology
文件頁數(shù): 25/100頁
文件大?。?/td> 0K
描述: IC MCU OTP 1KX14 EE COMP 18DIP
標準包裝: 25
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 30MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 1.75KB(1K x 14)
程序存儲器類型: OTP
EEPROM 大小: 128 x 8
RAM 容量: 96 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 18-DIP(0.300",7.62mm)
包裝: 管件
其它名稱: PIC16CE62430/P
PIC16CE62X
DS40182C-page 20
1999 Microchip Technology Inc.
4.3
PCL and PCLATH
The program counter (PC) is 13 bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The high byte (PC<12:8>) is not directly
readable or writable and comes from PCLATH. On any
reset, the PC is cleared. Figure 4-6 shows the two
situations for the loading of the PC. The upper example in
the figure shows how the PC is loaded on a write to PCL
(PCLATH<4:0>
→ PCH). The lower example in the figure
shows how the PC is loaded during a CALL or GOTO
instruction (PCLATH<4:3>
→ PCH).
FIGURE 4-6:
LOADING OF PC IN
DIFFERENT SITUATIONS
4.3.1
COMPUTED GOTO
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). When doing a
table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256 byte block). Refer to the
application
note,
“Implementing
a
Table
Read"
(AN556).
PC
12
8
7
0
5
PCLATH<4:0>
PCLATH
Instruction with
ALU result
GOTO, CALL
Opcode <10:0>
8
PC
12
11 10
0
11
PCLATH<4:3>
PCH
PCL
87
2
PCLATH
PCH
PCL
PCL as
Destination
4.3.2
STACK
The PIC16CE62X family has an 8 level deep x 13-bit
wide hardware stack (Figure 4-2 and Figure 4-3). The
stack space is not part of either program or data
space and the stack pointer is not readable or writ-
able. The PC is PUSHed onto the stack when a CALL
instruction is executed or an interrupt causes a
branch. The stack is POPed in the event of a
RETURN, RETLW
or a RETFIE instruction execution.
PCLATH is not affected by a PUSH or POP operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
Note 1:
There are no STATUS bits to indicate
stack
overflow
or
stack
underflow
conditions.
Note 2:
There are no instruction/mnemonics
called PUSH or POP. These are actions
that occur from the execution of the
CALL, RETURN, RETLW
and RETFIE
instructions or the vectoring to an
interrupt address.
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