PIC16C7X
DS30390D-page 300
1996 Microchip Technology Inc.
External Clock Timing ........................................61
Increment Delay .................................................61
Interrupt ..............................................................59
Interrupt Timing ..................................................60
Overview ............................................................57
Prescaler ............................................................62
Prescaler Block Diagram ...................................62
Section ...............................................................59
Switching Prescaler Assignment ........................63
Synchronization .................................................61
T0CKI .................................................................61
T0IF ..................................................................136
Timing ................................................................59
TMR0 Interrupt .................................................136
Timer1
Asynchronous Counter Mode ............................67
Block Diagram ....................................................66
Capacitor Selection ............................................67
External Clock Input ...........................................66
External Clock Input Timing ...............................67
Operation in Timer Mode ...................................66
Oscillator ............................................................67
Overview ............................................................57
Prescaler ......................................................66, 68
Resetting of Timer1 Registers ...........................68
Resetting Timer1 using a CCP Trigger Output ..68
Synchronized Counter Mode .............................66
T1CON ...............................................................65
TMR1H ...............................................................67
TMR1L ...............................................................67
Timer2
Block Diagram ....................................................69
Module ...............................................................69
Overview ............................................................57
Postscaler ..........................................................69
Prescaler ............................................................69
T2CON ...............................................................70
Timing Diagrams
A/D Conversion ........................172, 186, 212, 233, 255
Brown-out Reset ..............................127, 168, 204, 245
Capture/Compare/PWM ...........................206, 225, 247
CLKOUT and I/O ......................167, 181, 203, 222, 244
External Clock Timing ..............166, 180, 202, 220, 242
I
C Bus Data ............................................209, 229, 251
I
C Bus Start/Stop bits .............................208, 228, 250
I
C Clock Synchronization .........................................86
I
C Data Transfer Wait State .....................................84
I
C Multi-Master Arbitration ........................................86
I
C Reception .............................................................89
I
C Transmission .......................................................90
Parallel Slave Port ...................................................226
Power-up Timer .......................168, 182, 204, 223, 245
Reset ........................................168, 182, 204, 223, 245
SPI Mode .................................................207, 227, 249
SPI Mode Timing (No SS Control) .............................81
SPI Mode Timing (SS Control) ...................................81
Start-up Timer ..........................168, 182, 204, 223, 245
Time-out Sequence ..................................................131
Timer0 ................................59, 169, 183, 205, 224, 246
Timer0 Interrupt Timing ..............................................60
Timer0 with External Clock ........................................61
Timer1 ......................................................205, 224, 246
USART Asynchronous Master Transmission ...........100
USART Asynchronous Reception ............................101
USART RX Pin Sampling ...........................................98
USART Synchronous Receive .........................230, 252
2
2
2
2
2
2
2
USART Synchronous Reception ............................. 106
USART Synchronous Transmission ........ 104, 230, 252
Wake-up from Sleep via Interrupt ............................ 139
Watchdog Timer ...................... 168, 182, 204, 223, 245
TMR0 Register ................................................................... 28
TMR1CS bit ....................................................................... 65
TMR1H Register .......................................................... 26, 28
TMR1IE bit ......................................................................... 34
TMR1IF bit ................................................................... 36, 37
TMR1L Register ........................................................... 26, 28
TMR1ON bit ....................................................................... 65
TMR2 Register ............................................................. 26, 28
TMR2IE bit ......................................................................... 34
TMR2IF bit ................................................................... 36, 37
TMR2ON bit ....................................................................... 70
TO bit ................................................................................. 30
TOUTPS0 bit ..................................................................... 70
TOUTPS1 bit ..................................................................... 70
TOUTPS2 bit ..................................................................... 70
TOUTPS3 bit ..................................................................... 70
TRIS Instruction ............................................................... 153
TRISA Register ................................................ 25, 27, 29, 43
TRISB Register ................................................ 25, 27, 29, 45
TRISC Register ...................................................... 27, 29, 48
TRISD Register ...................................................... 25, 29, 50
TRISE Register ............................................................ 29, 52
Two’s Complement .............................................................. 9
TXIE bit .............................................................................. 35
TXIF bit .............................................................................. 37
TXSTA Register ................................................................. 93
U
UA bit ................................................................................. 77
Universal Synchronous Asynchronous Receiver Transmitter
(USART) ............................................................................ 93
USART
Asynchronous Mode .................................................. 99
Asynchronous Receiver ........................................... 101
Asynchronous Reception ......................................... 102
Asynchronous Transmission ................................... 100
Asynchronous Transmitter ......................................... 99
Baud Rate Generator (BRG) ..................................... 95
Receive Block Diagram ........................................... 101
Sampling .................................................................... 98
Synchronous Master Mode ...................................... 103
Synchronous Master Reception .............................. 105
Synchronous Master Transmission ......................... 103
Synchronous Slave Mode ........................................ 107
Synchronous Slave Reception ................................ 107
Synchronous Slave Transmit ................................... 107
Transmit Block Diagram ............................................ 99
UV Erasable Devices ........................................................... 7
W
W Register
ALU .............................................................................. 9
Wake-up from SLEEP ...................................................... 138
Watchdog Timer (WDT) ........................... 121, 126, 129, 137
WCOL bit ........................................................................... 78
WDT ................................................................................. 129
Block Diagram ......................................................... 137
Period ...................................................................... 137
Programming Considerations .................................. 137
Timeout .................................................................... 129
WDTE bit ......................................................................... 122
Word ................................................................................ 122
WR pin ............................................................................... 55