參數(shù)資料
型號: PIC16C74A-20/P
廠商: Microchip Technology
文件頁數(shù): 50/114頁
文件大?。?/td> 0K
描述: IC MCU OTP 4KX14 A/D PWM 40DIP
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 10
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 33
程序存儲器容量: 7KB(4K x 14)
程序存儲器類型: OTP
RAM 容量: 192 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
配用: 444-1001-ND - DEMO BOARD FOR PICMICRO MCU
PIC16C7X
DS30390E-page 40
1997 Microchip Technology Inc.
4.3
PCL and PCLATH
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The upper bits (PC<12:8>) are not
readable, but are indirectly writable through the
PCLATH register. On any reset, the upper bits of the
PC will be cleared. Figure 4-17 shows the two situa-
tions for the loading of the PC. The upper example in
the gure shows how the PC is loaded on a write to
PCL (PCLATH<4:0>
→ PCH). The lower example in
the gure shows how the PC is loaded during a CALL
or GOTO instruction (PCLATH<4:3>
→ PCH).
FIGURE 4-17: LOADING OF PC IN
DIFFERENT SITUATIONS
4.3.1
COMPUTED GOTO
A computed GOTO is accomplished by adding an off-
set to the program counter (ADDWF PCL). When doing
a table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256 byte block). Refer to the
application note
“Implementing a Table Read" (AN556).
4.3.2
STACK
The PIC16CXX family has an 8 level deep x 13-bit wide
hardware stack. The stack space is not part of either
program or data space and the stack pointer is not
readable or writable. The PC is PUSHed onto the stack
when a CALL instruction is executed or an interrupt
causes a branch. The stack is POPed in the event of a
RETURN,
RETLW
or a RETFIE instruction execution.
PCLATH is not affected by a PUSH or POP operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the rst
push. The tenth push overwrites the second push (and
so on).
Applicable Devices
72 73 73A 74 74A 76 77
PC
12
8
7
0
5
PCLATH<4:0>
PCLATH
Instruction with
ALU
GOTO, CALL
Opcode <10:0>
8
PC
12
11 10
0
11
PCLATH<4:3>
PCH
PCL
87
2
PCLATH
PCH
PCL
PCL as
Destination
4.4
Program Memory Paging
PIC16C7X devices are capable of addressing a contin-
uous 8K word block of program memory. The CALL and
GOTO
instructions provide only 11 bits of address to
allow branching within any 2K program memory page.
When doing a CALL or GOTO instruction the upper 2 bits
of the address are provided by PCLATH<4:3>. When
doing a CALL or GOTO instruction, the user must ensure
that the page select bits are programmed so that the
desired program memory page is addressed. If a return
from a CALL instruction (or interrupt) is executed, the
entire 13-bit PC is pushed onto the stack. Therefore,
manipulation of the PCLATH<4:3> bits are not required
for the return instructions (which POPs the address
from the stack).
Note 1: There are no status bits to indicate stack
overow or stack underow conditions.
Note 2: There are no instructions/mnemonics
called PUSH or POP. These are actions
that occur from the execution of the
CALL, RETURN, RETLW,
and RETFIE
instructions, or the vectoring to an inter-
rupt address.
Applicable Devices
72 73 73A 74 74A 76 77
Note:
PIC16C7X devices with 4K or less of pro-
gram
memory
ignore
paging
bit
PCLATH<4>. The use of PCLATH<4> as a
general purpose read/write bit is not rec-
ommended since this may affect upward
compatibility with future products.
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