PIC16C7X
DS30390B-page 300
1995 Microchip Technology Inc.
Figure 11-14:
Figure 11-15:
Figure 11-16:
Figure 11-17:
Figure 11-18:
Combined Format .....................................85
Multi-master Arbitration (Two Masters).....86
Clock Synchronization...............................86
SSP Block Diagram (I
I
C Waveforms for Reception
(7-bit Address)...........................................89
I
C Waveforms for Transmission
(7-bit Address)...........................................90
Operation of the I2C Module in IDLE_MODE,
RCV_MODE or XMIT_MODE ...................92
TXSTA: Transmit Status and Control
Register (Address 98h) .............................93
RCSTA: Receive Status and Control
Register (Address 18h).............................94
RX Pin Sampling Scheme (BRGH = 0).....98
RX Pin Sampling Scheme (BRGH = 1).....98
RX Pin Sampling Scheme (BRGH = 1).....98
USART Transmit Block Diagram...............99
Asynchronous Master Transmission.......100
Asynchronous Master Transmission
(Back to Back).........................................100
USART Receive Block Diagram..............101
Asynchronous Reception ........................101
Synchronous Transmission.....................104
Synchronous Transmission
(Through TXEN)......................................104
Synchronous Reception (Master Mode,
SREN).....................................................106
ADCON0 Register, PIC16C70/71/71A
(Address 08h)..........................................109
ADCON0 Register, PIC16C72/73/73A/74/
74A (Address 1Fh)..................................110
ADCON1 Register for PIC16C70/71/71A
(Address 88h)..........................................110
ADCON1 Register, PIC16C72/73/73A/74/
74A (Address 9Fh)..................................111
A/D Block Diagram, PIC16C70/71/71A...112
A/D Block Diagram, PIC16C72/73/73A/74/
74A..........................................................113
Analog Input Model .................................114
A/D Transfer Function.............................119
Flowchart of A/D Operation.....................119
Configuration Word for PIC16C71 ..........121
Configuration Word for PIC16C70/71A...122
Configuration Word for PIC16C73/74 .....122
Configuration Word for PIC16C72/73A/
74A..........................................................123
Crystal/Ceramic Resonator Operation
(HS, XT or LP OSC Configuration) .........123
External Clock Input Operation
(HS, XT or LP OSC Configuration) .........123
External Parallel Resonant Crystal Oscillator
Circuit......................................................125
External Series Resonant Crystal Oscillator
Circuit......................................................125
RC Oscillator Mode.................................125
Simplified Block Diagram of On-chip Reset
Circuit......................................................126
Brown-out Situations...............................127
Time-out Sequence on Power-up
(MCLR not Tied to V
DD
Time-out Sequence on Power-up
(MCLR Not Tied To V
DD
Time-out Sequence on Power-up
(MCLR Tied to V
DD
)................................131
External Power-on Reset Circuit (for Slow
V
DD
Power-up)........................................132
2
C Mode)................87
2
Figure 11-19:
2
Figure 11-20:
Figure 12-1:
Figure 12-2:
Figure 12-3:
Figure 12-4:
Figure 12-5:
Figure 12-6:
Figure 12-7:
Figure 12-8:
Figure 12-9:
Figure 12-10:
Figure 12-11:
Figure 12-12:
Figure 12-13:
Figure 13-1:
Figure 13-2:
Figure 13-3:
Figure 13-4:
Figure 13-5:
Figure 13-6:
Figure 13-7:
Figure 13-8:
Figure 13-9:
Figure 14-1:
Figure 14-2:
Figure 14-3:
Figure 14-4:
Figure 14-5:
Figure 14-6:
Figure 14-7:
Figure 14-8:
Figure 14-9:
Figure 14-10:
Figure 14-11:
Figure 14-12:
): Case 1.............131
Figure 14-13:
): Case 2...........131
Figure 14-14:
Figure 14-15:
Figure 14-16:
Figure 14-17:
Figure 14-18:
Figure 14-19:
Figure 14-20:
Figure 14-21:
Figure 14-22:
Figure 14-23:
Figure 14-24:
Figure 14-25:
Figure 14-26:
External Brown-out Protection Circuit 1.. 132
External Brown-out Protection Circuit 2.. 132
Interrupt Logic for PIC16C70/71/71A...... 134
Interrupt Logic for PIC16C72.................. 134
Interrupt Logic for PIC16C73/73A........... 134
Interrupt Logic for PIC16C74/74A........... 135
INT Pin Interrupt Timing.......................... 135
Watchdog Timer Block Diagram............. 137
Summary of Watchdog Timer Registers. 137
Wake-up from Sleep Through Interrupt .. 138
Typical In-Circuit Serial Programming
Connection.............................................. 139
General Format for Instructions.............. 141
PICMASTER System Configuration ....... 153
Load Conditions...................................... 165
External Clock Timing............................. 166
CLKOUT and I/O Timing......................... 167
Reset, Watchdog Timer, Oscillator Start-up
Timer and Power-up Timer Timing ......... 168
Brown-out Reset Timing ......................... 168
Timer0 Clock Timings............................. 169
A/D Conversion Timing........................... 172
Load Conditions...................................... 180
External Clock Timing............................. 181
CLKOUT and I/O Timing......................... 182
Reset, Watchdog Timer, Oscillator Start-up
Timer and Power-up Timer Timing ......... 183
Timer0 Clock Timings............................. 184
A/D Conversion Timing........................... 187
Typical RC Oscillator Frequency vs.
Temperature ........................................... 189
Typical RC Oscillator Frequency vs.
V
DD
......................................................... 189
Typical RC Oscillator Frequency vs.
V
DD
......................................................... 189
Typical RC Oscillator Frequency vs. V
Typical Ipd vs. V
DD
Watchdog Timer
Disabled 25
°
C......................................... 190
Typical Ipd vs. V
DD
Watchdog Timer
Enabled 25
°
C.......................................... 190
Maximum Ipd vs. V
DD
Watchdog
Disabled.................................................. 191
Maximum Ipd vs. V
DD
Watchdog
Enabled................................................... 191
Vth (Input Threshold Voltage) of I/O Pins vs.
V
DD
......................................................... 191
VIH, VIL of MCLR, T0CKI and OSC1 (in RC
Mode) vs. V
DD
........................................ 192
V
TH
(Input Threshold Voltage) of OSC1 Input
(in XT, HS, and LP Modes) vs. V
Typical I
DD
vs. Freq (Ext Clock, 25
Maximum, I
DD
vs. Freq (Ext Clock, -40
+85
°
C) .................................................... 193
Maximum Idd vs. Freq with A/D Off
(Ext Clock, -55
°
to +125
WDT Timer Time-out Period vs. V
Transconductance (gm) of HS Oscillator vs.
V
DD
......................................................... 194
Transconductance (gm) of LP Oscillator vs.
V
DD
......................................................... 195
Transconductance (gm) of XT Oscillator vs.
V
DD
......................................................... 195
IOH vs. VOH, V
DD
= 3V.......................... 195
IOH vs. VOH, V
DD
= 5V.......................... 195
IOL vs. VOL, V
DD
= 3V........................... 196
IOL vs. VOL, V
DD
= 5V........................... 196
Figure 15-1:
Figure 16-1:
Figure 17-1:
Figure 17-2:
Figure 17-3:
Figure 17-4:
Figure 17-5:
Figure 17-6:
Figure 17-7:
Figure 19-1:
Figure 19-2:
Figure 19-3:
Figure 19-4:
Figure 19-5:
Figure 19-6:
Figure 20-1:
Figure 20-2:
Figure 20-3:
Figure 20-4:
Figure 20-5:
DD
190
Figure 20-6:
Figure 20-7:
Figure 20-8:
Figure 20-9:
Figure 20-10:
Figure 20-11:
DD
........ 192
°
C).... 193
°
to
Figure 20-12:
Figure 20-13:
Figure 20-14:
°
C) .................... 194
DD
Figure 20-15:
Figure 20-16:
...... 194
Figure 20-17:
Figure 20-18:
Figure 20-19:
Figure 20-20:
Figure 20-21:
Figure 20-22: