參數(shù)資料
型號: PIC16C64AT-20I/L
廠商: Microchip Technology
文件頁數(shù): 76/126頁
文件大?。?/td> 0K
描述: IC MCU OTP 2KX14 PWM 44PLCC
標(biāo)準(zhǔn)包裝: 500
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 33
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 帶卷 (TR)
配用: 309-1040-ND - ADAPTER 44-PLCC ZIF TO 40-DIP
309-1039-ND - ADAPTER 44-PLCC TO 40-DIP
53
AT90S/LS4433
1042H–AVR–04/03
UART
The AT90S4433 features a full duplex (separate Receive and Transmit Registers) Uni-
versal Asynchronous Receiver and Transmitter (UART). The main features are:
Baud Rate Generator Generates any Baud Rate
High Baud Rates at Low XTAL Frequencies
8 or 9 Bits Data
Noise Filtering
Overrun Detection
Framing Error Detection
False Start Bit Detection
Three Separate Interrupts on TX Complete, TX Data Register Empty, and RX Complete
Multi-processor Communication Mode
Data Transmission
A block schematic of the UART Transmitter is shown in Figure 40.
Figure 40. UART Transmitter
Data transmission is initiated by writing the data to be transmitted to the UART I/O Data
Register (UDR). Data is transferred from UDR to the Transmit Shift Register when:
A new character has been written to UDR after the stop bit from the previous
character has been shifted out. The Shift Register is loaded immediately.
A new character has been written to UDR before the stop bit from the previous
character has been shifted out. The Shift Register is loaded when the stop bit of the
character currently being transmitted has been shifted out.
When data is transferred from UDR to the Shift Register, the UDRE (UART Data Regis-
ter Empty) bit in the UART Control and Status Register A, UCSRA, is set. When this bit
is set (one), the UART is ready to receive the next character. At the same time as the
UART CONTROL
AND STAUS
REGISTER B (UCSRB)
UART CONTROL
AND STAUS
REGISTER A (UCSRA)
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