參數(shù)資料
型號： PIC16C64AT-10/L
廠商： Microchip Technology
文件頁數(shù)： 81/126頁
文件大?。?/td> 0K
描述： IC MCU OTP 2KX14 PWM 44PLCC
標準包裝： 500
系列： PIC® 16C
核心處理器： PIC
芯體尺寸： 8-位
速度： 10MHz
連通性： I²C，SPI
外圍設(shè)備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 33
程序存儲器容量： 3.5KB（2K x 14）
程序存儲器類型： OTP
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 6 V
振蕩器型： 外部
工作溫度： 0°C ~ 70°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 帶卷 (TR)
配用： 309-1040-ND - ADAPTER 44-PLCC ZIF TO 40-DIP
309-1039-ND - ADAPTER 44-PLCC TO 40-DIP
58
AT90S/LS4433
1042H–AVR–04/03
Bit 4 – FE: Framing Error
This bit is set if a Framing Error condition is detected, i.e., when the stop bit of an incom-
ing character is zero.
The FE bit is cleared when the stop bit of received data is one.
Bit 3 – OR: OverRun
This bit is set if an OverRun condition is detected, i.e., when a character already present
in the UDR Register is not read before the next character has been shifted into the
Receiver Shift Register. The OR bit is buffered, which means that it will be set once the
valid data still in UDRE is read.
The OR bit is cleared (zero) when data is received and transferred to UDR.
Bits 2..1 – Res: Reserved Bits
These bits are reserved bits in the AT90S4433 and will always read as zero.
Bit 0 – MPCM: Multi-processor Communication Mode
This bit is used to enter Multi-processor Communication mode. The bit is set when the
slave MCU waits for an address byte to be received. When the MCU has been
addressed, the MCU switches off the MPCM bit and starts data reception.
For a detailed description, see “Multi-processor Communication Mode”.
UART Control and Status
Register B – UCSRB
Bit 7 – RXCIE: RX Complete Interrupt Enable
When this bit is set (one), a setting of the RXC bit in UCSRA will cause the Receive
Complete Interrupt routine to be executed, provided that global interrupts are enabled.
Bit 6 – TXCIE: TX Complete Interrupt Enable
When this bit is set (one), a setting of the TXC bit in UCSRA will cause the Transmit
Complete Interrupt routine to be executed, provided that global interrupts are enabled.
Bit 5 – UDRIE: UART Data Register Empty Interrupt Enable
When this bit is set (one), a setting of the UDRE bit in UCSRA will cause the UART Data
Register Empty Interrupt routine to be executed, provided that global interrupts are
enabled.
Bit 4 – RXEN: Receiver Enable
This bit enables the UART Receiver when set (one). When the Receiver is disabled, the
RXC, OR, and FE status flags cannot become set. If these flags are set, turning off
RXEN does not cause them to be cleared.
Bit
7654
321
0
$0A ($2A)
RXCIE
TXCIE
UDRIE
RXEN
TXEN
CHR9
RXB8
TXB8
UCSRB
Read/Write
R/W
R
W
Initial Value
0000
001
0
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PIC16C64AT-20/PQ 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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PIC16C64AT-20E/L 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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