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參數(shù)資料
| 型號(hào)： | PIC16C642-20/SO |
| 廠商： | Microchip Technology |
| 文件頁(yè)數(shù)： | 65/125頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU OTP 4KX14 28SOIC |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 系列： | PIC® 16C |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，LED，POR，WDT |
| 輸入/輸出數(shù)： | 22 |
| 程序存儲(chǔ)器容量： | 7KB（4K x 14） |
| 程序存儲(chǔ)器類型： | OTP |
| RAM 容量： | 176 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4 V ~ 6 V |
| 振蕩器型： | 外部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 包裝： | 管件 |
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Micrel, Inc.
KSZ8862-16/32MQL
April 2007
44
M9999-040407-3.0
Figure 11 illustrates how the 802.1p priority field is embedded in the 802.1Q VLAN tag.
TCI
76
6
2
length
Data
FCS
2
46-1500
4
Tagged Packet Type
(8100 for Ethernet)
802
802....1
11
1p
pp
p
VLAN ID
Bytes
Bits
16
3
12
802.1q VLAN Tag
2
SA
VPID
Preamble
DA
1
CF
I
1
SFD
Figure 11. 802.1p Priority Field Format
802.1p-based priority is enabled by bit 5 of registers P1CR1, P2CR1, and P3CR1 for ports 1, 2, and the host port,
respectively.
The KSZ8862M provides the option to insert or remove the priority tagged frame's header at each individual egress port.
This header, consisting of the 2 bytes VLAN protocol ID (VPID) and the 2 bytes tag control information field (TCI), is also
referred to as the 802.1Q VLAN tag.
Tag insertion is enabled by bit 2 of registers P1CR1, P2CR1, and P3CR1 for ports 1, 2, and the host port, respectively.
At the egress port, untagged packets are tagged with the ingress port’s default tag. The default tags are programmed in
register sets P1VIDCR, P2VIDCR, and P3VIDCR for ports 1, 2 and the host port, respectively. The KSZ8862M does not
add tags to already tagged packets.
Tag removal is enabled by bit 1 of registers P1CR1, P2CR1, and P3CR1 for ports 1, 2, and the host port, respectively. At
the egress port, tagged packets will have their 802.1Q VLAN Tags removed. The KSZ8862M will not modify untagged
packets.
The CRC is recalculated for both tag insertion and tag removal.
802.1p priority field re-mapping is a QoS feature that allows the KSZ8862M to set the “User Priority Ceiling” at any
ingress port. If the ingress packet’s priority field has a higher priority value than the default tag’s priority field of the ingress
port, the packet’s priority field is replaced with the default tag’s priority field. The “User Priority Ceiling” is enabled by bit 3
of registers P1CR2, P2CR2, and P3CR2 for ports 1, 2, and the host port, respectively.
DiffServ-Based Priority
DiffServ-based priority uses the ToS registers shown in the Priority Control Registers section. The ToS priority control
registers implement a fully decoded, 128-bit Differentiated Services Code Point (DSCP) register to determine packet
priority from the 6-bit ToS field in the IP header. When the most significant 6 bits of the ToS field are fully decoded, the
resultant of the 64 possibilities is compared with the corresponding bits in the DSCP register to determine priority.
Rate Limiting Support
The KSZ8862M supports hardware rate limiting from 64 Kbps to 88 Mbps, independently on the “receive side” and on the
“transmit side” on a per port basis. For 10-base T, a rate setting above 10 Mbps means the rate is not limited. On the
receive side, the data receive rate for each priority at each port can be limited by setting up Ingress Rate Control
Registers. On the transmit side, the data transmit rate for each priority queue at each port can be limited by setting up
Egress Rate Control Registers. The size of each frame has options to include minimum IFG (Inter Frame Gap) or
Preamble byte, in addition to the data field (from packet DA to FCS).
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| PIC16C642T-04/SO | 功能描述:8位微控制器 -MCU 7KB 176 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16C642T-04E/SO | 功能描述:8位微控制器 -MCU 7KB 176 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16C642T-04I/SO | 功能描述:8位微控制器 -MCU 7KB 176 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16C642T-10/SO | 功能描述:8位微控制器 -MCU 7KB 176 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16C642T-10E/SO | 功能描述:8位微控制器 -MCU 7KB 176 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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