參數(shù)資料
型號(hào): PIC16C62B-20I/ML
廠商: Microchip Technology
文件頁數(shù): 5/120頁
文件大小: 0K
描述: IC MCU OTP 2KX14 PWM 28QFN
標(biāo)準(zhǔn)包裝: 61
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲(chǔ)器容量: 3.5KB(2K x 14)
程序存儲(chǔ)器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-VQFN 裸露焊盤
包裝: 管件
其它名稱: PIC16C62B20I/ML
PIC16C62B/72A
DS35008B-page 102
Preliminary
1998 Microchip Technology Inc.
FIGURE 13-17: A/D CONVERSION TIMING
TABLE 13-14: A/D CONVERSION REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ
Max
Unit
s
Conditions
130
TAD
A/D clock period
PIC16CXX
1.6
——
sTOSC based, VREF ≥ 3.0V
PIC16LCXX
2.0
sTOSC based, VREF full range
PIC16CXX
2.0
4.0
6.0
sA/D RC Mode
PIC16LCXX
3.0
6.0
9.0
sA/D RC Mode
131
TCNV Conversion time (not including S/H
time) (Note 1)
11
11
TAD
132
TACQ Acquisition time
Note 2
5*
20
s
s The minimum time is the
amplifier settling time. This
may be used if the "new" input
voltage has not changed by
more than 1 LSb (i.e., 20.0 mV
@ 5.12V) from the last sam-
pled voltage (as stated on
CHOLD).
134
TGO
Q4 to A/D clock start
TOSC/2
If the A/D clock source is
selected as RC, a time of TCY
is added before the A/D clock
starts. This allows the SLEEP
instruction to be executed.
135
Tswc Switching from convert
→ sample
time
1.5
TAD
* These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25
°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: ADRES register may be read on the following TCY cycle.
2: See Section 9.1 for min conditions.
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
DONE
NEW_DATA
(Tosc/2) (1)
7
6
5
432
1
0
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This
allows the SLEEP instruction to be executed.
1 TCY
134
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