參數(shù)資料
型號: PIC16C554/JW
廠商: Microchip Technology
文件頁數(shù): 29/108頁
文件大?。?/td> 0K
描述: IC MCU EPROM 512X14 18CDIP
標準包裝: 25
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設備: POR,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 896B(512 x 14)
程序存儲器類型: EPROM,UV
RAM 容量: 80 x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 18-CDIP(0.300",7.62mm)窗口
包裝: 管件
2002 Microchip Technology Inc.
Preliminary
DS40143D-page 25
PIC16C55X
5.2
PORTB and TRISB Registers
PORTB is an 8-bit wide bi-directional port. The
corresponding data direction register is TRISB. A '1' in
the TRISB register puts the corresponding output driver
in a Hi-impedance mode. A '0' in the TRISB register
puts the contents of the output latch on the selected
pin(s).
Reading PORTB register reads the status of the pins
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. So a write
to a port implies that the port pins are first read, then
this value is modified and written to the port data latch.
Each of the PORTB pins has a weak internal pull-up
(
≈200 A typical). A single control bit can turn on all the
pull-ups.
This
is
done
by
clearing
the
RBPU
(OPTION<7>) bit. The weak pull-up is automatically
turned off when the port pin is configured as an output.
The pull-ups are disabled on Power-on Reset.
Four of PORTB’s pins, RB7:RB4, have an interrupt-on-
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e., any RB7:RB4 pin
configured as an output is excluded from the interrupt-
on-change comparison). The input pins (of RB7:RB4)
are compared with the old value latched on the last
read of PORTB. The “mismatch” outputs of RB7:RB4
are OR’ed together to generate the RBIF interrupt (flag
latched in INTCON<0>). This interrupt can wake the
device from SLEEP. The user, in the interrupt service
routine, can clear the interrupt in the following manner:
Any read or write of PORTB (this will end the mis-
match condition)
Clear flag bit RBIF
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition, and
allow flag bit RBIF to be cleared.
The interrupt on mismatch feature, together with
software configurable pull-ups on these four pins,
allows easy interface to a key pad and make it possible
for wake-up on key-depression. (See AN552 in the
Microchip Embedded Control Handbook.)
The interrupt-on-change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt-on-change
feature. Polling of PORTB is not recommended while
using the interrupt-on-change feature.
FIGURE 5-3:
BLOCK DIAGRAM OF RB7:RB4 PINS
Note 1: If a change on the I/O pin should occur
when the read operation is being exe-
cuted (start of the Q2 cycle), then the
RBIF interrupt flag may not get set.
P
N
V
SS
V
DD
Data Latch
From other
RBPU(1)
P
V
DD
I/O
Data Bus
WR PORTB
WR TRISB
Set RBIF
TRIS Latch
RD TRISB
RD PORTB
RB7:RB4 pins
weak
pull-up
RD PORTB
Latch
TTL
Input
Buffer
pin
ST
Buffer
RB7:RB6 in Serial Programming mode
V
DD
V
SS
Q
D
CK
Q
D
Q
CK
EN
Q
D
EN
QD
Note
1:
TRISB = 1 enables weak pull-up if RBPU = ‘0’ (OPTION<7>).
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