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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | PIC16C54C-20/SS |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 159/194闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC MCU OTP 512X12 20SSOP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 67 |
| 绯诲垪锛� | PIC® 16C |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 20MHz |
| 澶栧湇瑷�(sh猫)鍌欙細 | POR锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 12 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 768B锛�512 x 12锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | OTP |
| RAM 瀹归噺锛� | 25 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 3 V ~ 5.5 V |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 灏佽/澶栨锛� | 20-SSOP锛�0.209"锛�5.30mm 瀵級 |
| 鍖呰锛� | 绠′欢 |
| 閰嶇敤锛� | XLT20SS-1-ND - SOCKET TRANSITION 18DIP 20SSOP AC164307-ND - MODULE SKT FOR PM3 28SSOP |
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PIC18F2450/4450
2006 Microchip Technology Inc.
Advance Information
DS39760A-page 65
PORTC
RC7
RC6
RC5(6)
RC4(6)
鈥�
RC2
RC1
RC0
xxxx -xxx
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
xxxx xxxx
PORTA
鈥擱A6(4)
RA5
RA4
RA3
RA2
RA1
RA0
-x0x 0000
UEP15
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP14
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP13
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP12
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP11
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP10
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP9
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP8
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP7
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP6
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP5
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP4
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP3
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP2
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP1
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UEP0
鈥�
EPHSHK
EPCONDIS
EPOUTEN
EPINEN
EPSTALL
---0 0000
UCFG
UTEYE
UOEMON
鈥�
UPUEN
UTRDIS
FSEN
PPB1
PPB0
00-0 0000
UADDR
鈥�
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
-000 0000
UCON
鈥�
PPBRST
SE0
PKTDIS
USBEN
RESUME
SUSPND
鈥�
-0x0 000-
USTAT
鈥�
ENDP3
ENDP2
ENDP1
ENDP0
DIR
PPBI
鈥�
-xxx xxx-
UEIE
BTSEE
鈥�
BTOEE
DFN8EE
CRC16EE
CRC5EE
PIDEE
0--0 0000
UEIR
BTSEF
鈥�
BTOEF
DFN8EF
CRC16EF
CRC5EF
PIDEF
0--0 0000
UIE
鈥�
SOFIE
STALLIE
IDLEIE
TRNIE
ACTVIE
UERRIE
URSTIE
-000 0000
UIR
鈥�
SOFIF
STALLIF
IDLEIF
TRNIF
ACTVIF
UERRIF
URSTIF
-000 0000
UFRMH
鈥�
FRM10
FRM9
FRM8
---- -xxx
UFRML
FRM7
FRM6
FRM5
FRM4
FRM3
FRM2
FRM1
FRM0
xxxx xxxx
TABLE 5-2:
REGISTER FILE SUMMARY (PIC18F2450/4450) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Details
on page
Legend:
x
= unknown, u = unchanged, - = unimplemented, q = value depends on condition. Shaded cells are unimplemented, read as 鈥�0鈥�.
Note
1:
Bit 21 of the TBLPTRU allows access to the device Configuration bits.
2:
The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as 鈥�0鈥�.
3:
These registers and/or bits are not implemented on 28-pin devices and are read as 鈥�0鈥�. Reset values are shown for 40/44-pin devices;
individual unimplemented bits should be interpreted as 鈥�-鈥�.
4:
RA6 is configured as a port pin based on various primary oscillator modes. When the port pin is disabled, all of the associated bits read 鈥�0鈥�.
5:
RE3 is only available as a port pin when the MCLRE Configuration bit is clear; otherwise, the bit reads as 鈥�0鈥�.
6:
RC5 and RC4 are only available as port pins when the USB module is disabled (UCON<3> = 0).
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| VI-BT1-IW-F3 | CONVERTER MOD DC/DC 12V 100W |
| PIC16LC56A-04/P | IC MCU OTP 1KX12 18DIP |
| VI-BT1-IW-F2 | CONVERTER MOD DC/DC 12V 100W |
| PIC16LF1904-I/P | MCU 7KB FLASH 256B RAM 40-PDIP |
| VI-B5N-IX-F4 | CONVERTER MOD DC/DC 18.5V 75W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16C54C-40/P | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU .75KB 25 RAM 12 I/O 40MHz PDIP18 RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16C54C-40/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU .75KB 25 RAM 12 I/O 40MHz SOIC18 RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16C54C-40/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU .75KB 25 RAM 12 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16C54CT-04/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU .75KB 25 RAM 12 I/O 4MHz SOIC18 RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16C54CT-04/SO092 | 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪: |
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