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    參數(shù)資料
    型號(hào): PIC16C432T-E/SS
    廠商: Microchip Technology
    文件頁數(shù): 46/70頁
    文件大?。?/td> 0K
    描述: IC MCU CMOS 8BIT 20MHZ 2K 20SSOP
    標(biāo)準(zhǔn)包裝: 1,600
    系列: PIC® 16C
    核心處理器: PIC
    芯體尺寸: 8-位
    速度: 20MHz
    連通性: LIN(本地互連網(wǎng)絡(luò))
    外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,WDT
    輸入/輸出數(shù): 12
    程序存儲(chǔ)器容量: 3.5KB(2K x 14)
    程序存儲(chǔ)器類型: OTP
    RAM 容量: 128 x 8
    電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
    振蕩器型: 外部
    工作溫度: -40°C ~ 125°C
    封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
    包裝: 帶卷 (TR)
    配用: AC164029-ND - MODULE SKT PROMATEII 20DIP/SSOP
    PIC16C432
    DS41140B-page 48
    Preliminary
    2002 Microchip Technology Inc.
    9.4
    Power-on Reset (POR), Power-up
    Timer (PWRT), Oscillator Start-up
    Timer (OST) and Brown-out Reset
    (BOD)
    9.4.1
    POWER-ON RESET (POR)
    The on-chip POR circuit holds the chip in RESET until
    VDD has reached a high enough level for proper oper-
    ation. To take advantage of the POR, just tie the MCLR
    pin through a resistor to VDD. This will eliminate exter-
    nal RC components usually needed to create Power-on
    Reset. A maximum rise time for VDD is required. See
    electrical specifications for details.
    The POR circuit does not produce an internal RESET
    when VDD declines.
    When the device starts normal operation (exits the
    RESET condition), device operating parameters (volt-
    age, frequency, temperature, etc.) must be met to
    ensure operation. If these conditions are not met, the
    device must be held in RESET until the operating condi-
    tions are met.
    For additional information, refer to Application Note
    AN607, “Power-up Trouble Shooting”.
    9.4.2
    POWER-UP TIMER (PWRT)
    The Power-up Timer provides a fixed 72 ms (nominal)
    timeout on power-up only, from POR or Brown-out
    Reset. The Power-up Timer operates on an internal RC
    oscillator. The chip is kept in RESET as long as PWRT
    is active. The PWRT delay allows the VDD to rise to an
    acceptable level. A configuration bit, PWRTE, can
    disable (if set), or enable (if cleared or programmed)
    the Power-up Timer. The Power-up Timer should
    always be enabled when Brown-out Reset is enabled.
    The Power-Up time delay will vary from chip-to-chip
    and due to VDD, temperature and process variation.
    See DC parameters for details.
    9.4.3
    OSCILLATOR START-UP TIMER
    (OST)
    The Oscillator Start-up Timer (OST) provides a 1024
    oscillator cycle (from OSC1 input) delay after the
    PWRT delay is over. This ensures that the crystal
    oscillator or resonator has started and stabilized.
    The OST timeout is invoked only for XT, LP and HS
    modes and only on Power-on Reset or wake-up from
    SLEEP.
    9.4.4
    BROWN-OUT RESET (BOD)
    The PIC16C432 has an on-chip Brown-out Reset cir-
    cuitry. A configuration bit, BOREN, can disable (if clear/
    programmed), or enable (if set) the Brown-out Reset
    circuitry. If VDD falls below 4.0V (refer to BVDD param-
    eter D005) for greater than parameter (TBOR) in
    Table 12-6, the brown-out situation will reset the chip.
    A RESET won’t occur if VDD falls below 4.0V for less
    than parameter (TBOR).
    On any RESET (Power-on, Brown-out, Watchdog,
    etc.), the chip will remain in RESET until VDD rises
    above BVDD. The Power-up Timer will then be invoked
    and will keep the chip in RESET an additional 72 ms.
    If VDD drops below BVDD while the Power-up Timer is
    running, the chip will go back into a Brown-out Reset and
    the Power-up Timer will be re-initialized. Once VDD rises
    above BVDD, the Power-up Timer will execute a 72 ms
    RESET. The Power-up Timer should always be enabled
    when Brown-out Reset is enabled. Figure 9-7 shows
    typical Brown-out situations.
    FIGURE 9-7:
    BROWN-OUT SITUATIONS
    72 ms
    BVDD
    VDD
    Internal
    Reset
    BVDD
    VDD
    Internal
    Reset
    72 ms
    <72 ms
    72 ms
    BVDD
    VDD
    Internal
    Reset
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