
Micrel, Inc.
KSZ8841-PMQL
October 2007
59
M9999-100407-1.5
Bit
Default
R/W
Description
Is the Same as
4
0
RO
MDIX Status (mdix_st)
1 = MDIX
0 = MDI
P1SR, bit 7
3
0
RW
Force Link (force_lnk)
1 = Force link pass
0 = Normal Operation
P1SCSLMD,
bit 11
2
1
RW
Power Saving (pwrsave)
1 = Disable
0 = Enable power saving
P1SCSLMD,
bit 10
1
0
RW
Remote loopback (rlb)
1 = Loop back at PMD/PMA of port’s PHY
(RXP1/RXM1 -> TXP1/TXM1)
0 = Normal operation.
P1SCSLMD, bit 9
0
RW
Reserved
Reserved (Offset 0x04F8 - 0x04FA)
Bit
Default
R/W
Description
15-0
0x0000
RO
Reserved
Port 1 PHY Special Control/Status, LinkMD (Offset 0x0510): P1SCSLMD
This register contains the port LinkMD control register for the chip function.
Bit
Default
R/W
Description
Is the Same as
15
0
RO
Vct 10M short
Less than 10 meter short
P1VCT, bit 12
14-13
0
RO
Vct result
[00] = Normal condition
[01] = Open condition has been detected in
cable
[10] = Short condition has been detected in
cable
[11] = Cable diagnostic test is failed
P1VCT, bits 14 - 13
12
0
RW
SC
(self -
clear)
Vct enable
1 = The cable diagnostic test is enabled. It’ll
be self-cleared after VCT test is done
0 = It indicates the cable diagnostic test is
completed and the status information is valid
for read
P1VCT, bit 15
11
0
RW
Force Link
1 = Force link pass
0 = Normal Operation
P1PHYCTRL, bit 3
10
1
RW
Power Saving
1 = Disable
0 = Enable power saving
P1PHYCTRL, bit 2