參數(shù)資料
型號(hào): PIC12F510-I/SN
廠商: Microchip Technology
文件頁(yè)數(shù): 26/39頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 1.5KB 8SOIC
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 100
系列: PIC® 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 8MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 5
程序存儲(chǔ)器容量: 1.5KB(1K x 12)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 38 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 637 (CN2011-ZH PDF)
配用: AC162070-ND - HEADER INTRFC MPLAB ICD2 8/14P
32
6462AS–ATARM–03-Jun-09
AT91SAM9G10
10.5
Static Memory Controller
External memory mapping, 256 Mbyte address space per Chip Select Line
Up to Eight Chip Select Lines
8-, 16- or 32-bit Data Bus
Multiple Access Modes supported
– Byte Write or Byte Select Lines
– Asynchronous read in Page Mode supported (4- up to 32-byte page size)
Multiple device adaptability
– Compliant with LCD Module
– Control signal programmable setup, pulse and hold time for each Memory Bank
Multiple Wait State Management
– Programmable Wait State Generation
– External Wait Request
– Programmable Data Float Time
Slow Clock Mode Supported
10.6
SDRAM Controller
Supported Devices
– Standard and Low Power SDRAM (Mobile SDRAM)
Numerous configurations supported
– 2K, 4K, 8K Row Address Memory Parts
– SDRAM with two or four Internal Banks
– SDRAM with 16- or 32-bit Data Path
Programming Facilities
– Word, half-word, byte access
– Automatic page break when Memory Boundary has been reached
– Multibank Ping-pong Access
– Timing parameters specified by software
– Automatic refresh operation, refresh rate is programmable
Energy-saving Capabilities
– Self-refresh, power down and deep power down modes supported
Error detection
– Refresh Error Interrupt
SDRAM Power-up Initialization by software
CAS Latency of 1, 2 and 3 supported
Auto Precharge Command not used
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