參數(shù)資料
型號(hào): PIC12F510-I/MC
廠商: Microchip Technology
文件頁數(shù): 10/39頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 1024X12 8DFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 150
系列: PIC® 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 8MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 5
程序存儲(chǔ)器容量: 1.5KB(1K x 12)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 38 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-VFDFN 裸露焊盤
包裝: 管件
產(chǎn)品目錄頁面: 637 (CN2011-ZH PDF)
配用: AC164334-ND - MODULE SOCKET FOR 8L 2X3MM DFN
AC163022-ND - ADAPTER UNIVERSAL PROG PIC12F5XX
AC162070-ND - HEADER INTRFC MPLAB ICD2 8/14P
XLT08DFN2-ND - SOCKET TRANSITION ICE 14DIP/8DFN
18
6462AS–ATARM–03-Jun-09
AT91SAM9G10
8.1.2.1
BMS = 1, Boot on Embedded ROM
The system boots using the Boot Program.
Enable the 32,768 Hz oscillator
Auto baudrate detection
Downloads and runs an application from external storage media into internal SRAM
Automatic detection of valid application
Bootloader on a non-volatile memory
– SPI Serial Flash or DataFlash connected on NPCS0 of the SPI0
–NAND Flash
– SDCard (boot ROM does not support high-capacity SDCards)
SAM-BA Boot in case no valid program is detected in external NVM, supporting
– Serial communication on a DBGU
– USB Device HS Port
8.1.2.2
BMS = 0, Boot on External Memory
Boot on slow clock (32,768 Hz)
Boot with the default configuration for the Static Memory Controller, byte select mode, 16-bit
data bus, Read/Write controlled by Chip Select, allows boot on 16-bit non-volatile memory.
The customer-programmed software must perform a complete configuration.
To speed up the boot sequence when booting at 32 kHz EBI CS0 (BMS=0), the user must take
the following steps:
1.
Program the PMC (main oscillator enable or bypass mode).
2.
Program and start the PLL.
3.
Reprogram the SMC setup, cycle, hold, mode timings registers for CS0 to adapt them
to the new clock
4.
Switch the main clock to the new value.
8.2
External Memories
The external memories are accessed through the External Bus Interface (Bus Matrix Slave 3).
Refer to the memory map in Figure 8-1 on page 15.
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