參數(shù)資料
型號(hào)： PIC12F509-I/SN
廠商： Microchip Technology
文件頁(yè)數(shù)： 36/44頁(yè)
文件大?。?/td> 0K
描述： IC MCU FLASH 1KX12 8SOIC
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝： 100
系列： PIC® 12F
核心處理器： PIC
芯體尺寸： 8-位
速度： 4MHz
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 5
程序存儲(chǔ)器容量： 1.5KB（1K x 12）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 41 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
包裝： 管件
產(chǎn)品目錄頁(yè)面： 637 (CN2011-ZH PDF)
配用： AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN
41
6062LS–ATARM–23-Mar-09
AT91SAM9261
13. Revision History
Table 13-1.
Revision History
Doc.
Rev.
Source
Comments
6062AS
Qualified/Internal: 23-Aug-04
6062BS
Date: 02-Jun-05
CSR 04-370
Change to Additional Embedded Memories in “Features” on page 1. Change to Section 5.2 “Power
CSR 04-371
CSR 04-376
Added NTRST signal to“Block Diagram” on page 4. NTRST signal added to Table 3-1 on page 5. F1
CSR 04-446
Changed ROM access to single cycle in “Features” on page 1 and Section 8.1 “Embedded Memories”
CSR 04-447
Replaced “PDMA” with “PDC” throughout. Replaced “Peripheral DMA” with “Peripheral DMA Controller”
throughout.
CSR 04-461
New pinout for 217-ball LFBGA package, Table 2 updated.
CSR 04-475
Updated Section 8.1.2 ”Boot Program” on page 20.
Removed “Embedded Software Services” on page 18.
CSR 05-023
Changed min voltage level for VDDIOM and VDDIOP to 2.7V throughout. Corrected nominal voltage
level for VDDIOP and VDDIOP in Section 5.1 “Power Supplies” on page 11.
CSR 05-024
Added information on chip select assignment management in Section 10.4 “External Bus Interface” on
Added information on configuration management of embedded pad pull-up in Section 10.13 “USB” on
Throughout document: All references to SmartMedia removed and replaced by NAND Flash. All signals
SMxx changed to NANDxx.
Throughout document: Package now qualified as RoHS-compliant
Changed pull-up resistor level to 10 kOhm in Section 6.4 “PIO Controller A, B and C Lines” on page 12.
Changed typical conditions for VDDCORE to 1.2V in Section 5.2 “Power Consumption” on page 11.
Corrected BMS reset condition for ROM access in Section 8.1.1.2 “Internal ROM” on page 19.
6062CS
Date: 15-Nov-05
CSR 05-398
CSR 05-481
CSR 05-496
Changed value of programmable pull-up resistor in Section 6.4 “PIO Controller A, B and C Lines” on
CSR 05-487
Updated Table 12-1, “AT91SAM9261 Ordering Information,” on page 40.
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