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參數(shù)資料
| 型號： | PIC12F509-E/MS |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 8/44頁 |
| 文件大小： | 0K |
| 描述： | IC PIC MCU FLASH 1KX12 8MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Asynchronous Stimulus |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 系列： | PIC® 12F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 4MHz |
| 外圍設(shè)備： | POR，WDT |
| 輸入/輸出數(shù)： | 5 |
| 程序存儲器容量： | 1.5KB（1K x 12） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 41 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 包裝： | 管件 |
| 配用： | AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN AC164325-ND - MODULE SKT FOR 8MSOP DVA12XP080-ND - ADAPTER DEVICE FOR MPLAB-ICE |
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PIC12F508/509/16F505
DS41236E-page 16
2009 Microchip Technology Inc.
3.1
Clocking Scheme/Instruction
Cycle
The clock input (OSC1/CLKIN pin) is internally divided
by four to generate four non-overlapping quadrature
clocks, namely Q1, Q2, Q3 and Q4. Internally, the PC
is incremented every Q1 and the instruction is fetched
from program memory and latched into the instruction
register in Q4. It is decoded and executed during the
following Q1 through Q4. The clocks and instruction
execution flow is shown in Figure 3-3 and Example 3-1.
3.2
Instruction Flow/Pipelining
An instruction cycle consists of four Q cycles (Q1, Q2,
Q3 and Q4). The instruction fetch and execute are
pipelined such that fetch takes one instruction cycle,
while decode and execute take another instruction
cycle. However, due to the pipelining, each instruction
effectively executes in one cycle. If an instruction
causes the PC to change (e.g., GOTO), then two cycles
are required to complete the instruction (Example 3-1).
A fetch cycle begins with the PC incrementing in Q1.
In the execution cycle, the fetched instruction is latched
into the Instruction Register (IR) in cycle Q1. This
instruction is then decoded and executed during the
Q2, Q3 and Q4 cycles. Data memory is read during Q2
(operand read) and written during Q4 (destination
write).
FIGURE 3-3:
CLOCK/INSTRUCTION CYCLE
EXAMPLE 3-1:
INSTRUCTION PIPELINE FLOW
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
OSC1
Q1
Q2
Q3
Q4
PC
PC + 1
PC + 2
Fetch INST (PC)
Execute INST (PC – 1)
Fetch INST (PC + 1)
Execute INST (PC)
Fetch INST (PC + 2)
Execute INST (PC + 1)
Internal
phase
clock
All instructions are single cycle, except for any program branches. These take two cycles, since the fetch instruction
is “flushed” from the pipeline, while the new instruction is being fetched and then executed.
1. MOVLW 03H
Fetch 1
Execute 1
2. MOVWF PORTB
Fetch 2
Execute 2
3. CALL
SUB_1
Fetch 3
Execute 3
4. BSF
PORTB, BIT1
Fetch 4
Flush
Fetch SUB_1 Execute SUB_1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PIC12F509-I | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8/14-Pin, 8-Bit Flash Microcontrollers |
| PIC12F509I/MC | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8/14-Pin, 8-Bit Flash Microcontrollers |
| PIC12F509-I/MC | 功能描述:8位微控制器 -MCU 1.5KB FLASH 25B RAM 4MHz INTOSC DFN8 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC12F509I/MG | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8/14-Pin, 8-Bit Flash Microcontrollers |
| PIC12F509I/MS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8/14-Pin, 8-Bit Flash Microcontrollers |
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