參數(shù)資料
型號: PIC12F508T-I/MC
廠商: Microchip Technology
文件頁數(shù): 31/44頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 512X12 8DFN
產(chǎn)品培訓模塊: Asynchronous Stimulus
標準包裝: 3,300
系列: PIC® 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 5
程序存儲器容量: 768B(512 x 12)
程序存儲器類型: 閃存
RAM 容量: 25 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-VFDFN 裸露焊盤
包裝: 帶卷 (TR)
配用: AC164334-ND - MODULE SOCKET FOR 8L 2X3MM DFN
AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN
DVA12XP080-ND - ADAPTER DEVICE FOR MPLAB-ICE
37
6062LS–ATARM–23-Mar-09
AT91SAM9261
Test Modes
– Remote Loopback, Local Loopback, Automatic Echo
10.10 Synchronous Serial Controller
Provides serial synchronous communication links used in audio and telecom applications
(with CODECs in Master or Slave Modes, I
2S, TDM Buses, Magnetic Card Reader and
more).
Contains an independent receiver and transmitter and a common clock divider.
Offers a configurable frame sync and data length.
Receiver and transmitter can be programmed to start automatically or on detection of
different event on the frame sync signal.
Receiver and transmitter include a data signal, a clock signal and a frame synchronization
signal.
10.11 Timer Counter
Three 16-bit Timer Counter Channels
Wide range of functions including:
– Frequency Measurement
– Event Counting
– Interval Measurement
– Pulse Generation
–Delay Timing
– Pulse Width Modulation
– Up/down Capabilities
Each channel is user-configurable and contains:
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
Two global registers that act on all three TC Channels
10.12 Multimedia Card Interface
Compatibility with MultiMedia Card Specification Version 2.2
Compatibility with SD Memory Card Specification Version 1.0
Cards clock rate up to Master Clock divided by 2
Embedded power management to slow down clock rate when not used
Each MCI has two slots, each supporting
– One slot for one MultiMedia Card bus (up to 30 cards) or
– One SD Memory Card
Support for stream, block and multi-block data read and write
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