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參數(shù)資料
| 型號： | PIC12C671-04I/SM |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 45/129頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU OTP 1KX14 A/D 8-SOIJ |
| 產(chǎn)品培訓(xùn)模塊： | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | PIC® 12C |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 4MHz |
| 外圍設(shè)備： | POR，WDT |
| 輸入/輸出數(shù)： | 5 |
| 程序存儲器容量： | 1.75KB（1K x 14） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 4x8b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.209"，5.30mm 寬） |
| 包裝： | 管件 |
| 配用： | AC164312-ND - MODULE SKT FOR PM3 16SOIC ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING 309-1048-ND - ADAPTER 8-SOIC TO 8-DIP 309-1047-ND - ADAPTER 8-SOIC TO 8-DIP AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC |
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PIC12C67X
DS30561B-page 22
1999 Microchip Technology Inc.
4.3
PCL and PCLATH
The Program Counter (PC) is 13-bits wide. The low
byte comes from the PCL Register, which is a readable
and writable register. The high byte (PC<12:8>) is not
directly readable or writable and comes from PCLATH.
On any reset, the PC is cleared. Figure 4-3 shows the
two situations for the loading of the PC. The upper
example in the figure shows how the PC is loaded on a
write to PCL (PCLATH<4:0>
→ PCH). The lower exam-
ple in the figure shows how the PC is loaded during a
CALL
or GOTO instruction (PCLATH<4:3>
→ PCH).
FIGURE 4-3:
LOADING OF PC IN
DIFFERENT SITUATIONS
4.3.1
COMPUTED GOTO
A Computed GOTO is accomplished by adding an off-
set to the program counter (ADDWF PCL). When doing
a table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256 byte block). Refer to the
application note
“Implementing a Table Read" (AN556).
PC
12
8
7
0
5
PCLATH<4:0>
PCLATH
Instruction with
ALU result
GOTO, CALL
Opcode <10:0>
8
PC
12
11 10
0
11
PCLATH<4:3>
PCH
PCL
87
2
PCLATH
PCH
PCL
PCL as
Destination
4.3.2
STACK
The PIC12C67X family has an 8-level deep x 13-bit
wide hardware stack. The stack space is not part of
either program or data space and the stack pointer is
not readable or writable. The PC is PUSHed onto the
stack when a CALL instruction is executed or an inter-
rupt causes a branch. The stack is POPed in the event
of a RETURN, RETLW or a RETFIE instruction execu-
tion. PCLATH is not affected by a PUSH or POP oper-
ation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
4.4
Program Memory Paging
The
PIC12C67X
ignores
both
paging
bits
PCLATH<4:3>, which are used to access program
memory when more than one page is available. The
use of PCLATH<4:3> as general purpose read/write
bits for the PIC12C67X is not recommended since this
may affect upward compatibility with future products.
Note 1: There are no status bits to indicate stack
overflow or stack underflow conditions.
2: There are no instructions/mnemonics
called PUSH or POP. These are actions
that occur from the execution of the
CALL, RETURN, RETLW,
and RETFIE
instructions, or the vectoring to an inter-
rupt address.
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| PIC12C671-10 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter |
| PIC12C671-10/JM | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter |
| PIC12C671-10/JW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|8-BIT|PIC CPU|CMOS|DIP|8PIN|CERAMIC |
| PIC12C671-10/P | 功能描述:8位微控制器 -MCU 1.75KB 128 RAM 6 I/O 10MHz PDIP8 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC12C671-10/P | 制造商:Microchip Technology Inc 功能描述:IC 8BIT CMOS MCU 12C671 DIP8 |
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