參數(shù)資料
型號： PIC12C509A-04I/SM
廠商： Microchip Technology
文件頁數(shù)： 20/113頁
文件大?。?/td> 0K
描述： IC MCU OTP 1KX12 8-SOIJ
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝： 90
系列： PIC® 12C
核心處理器： PIC
芯體尺寸： 8-位
速度： 4MHz
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 5
程序存儲器容量： 1.5KB（1K x 12）
程序存儲器類型： OTP
RAM 容量： 41 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-SOIC（0.209"，5.30mm 寬）
包裝： 管件
配用： XLT08SO-1-ND - SOCKET TRANSITION 8SOIC 150/208
AC164312-ND - MODULE SKT FOR PM3 16SOIC
ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
309-1048-ND - ADAPTER 8-SOIC TO 8-DIP
309-1047-ND - ADAPTER 8-SOIC TO 8-DIP
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
PIC12C5XX
DS40139E-page 14
1999 Microchip Technology Inc.
4.2
Data Memory Organization
Data memory is composed of registers, or bytes of
RAM. Therefore, data memory for a device is specified
by its register file. The register file is divided into two
functional groups: special function registers and
general purpose registers.
The special function registers include the TMR0
register, the Program Counter (PC), the Status
Register, the I/O registers (ports), and the File Select
Register (FSR). In addition, special purpose registers
are used to control the I/O port configuration and
prescaler options.
The general purpose registers are used for data and
control information under command of the instructions.
For the PIC12C508, PIC12C508A and PIC12CE518,
the register file is composed of 7 special function
registers and 25 general purpose registers (Figure 4-
For the PIC12C509, PIC12C509A, PIC12CR509A,
and PIC12CE519 the register file is composed of 7
special
function
registers,
25
general
purpose
registers, and 16 general purpose registers that may
be addressed using a banking scheme (Figure 4-3).
4.2.1
GENERAL PURPOSE REGISTER FILE
The general purpose register file is accessed either
directly or indirectly through the file select register FSR
FIGURE 4-2:
PIC12C508, PIC12C508A AND
PIC12CE518 REGISTER FILE
MAP
File Address
00h
01h
02h
03h
04h
05h
06h
07h
1Fh
INDF(1)
TMR0
PCL
STATUS
FSR
OSCCAL
GPIO
General
Purpose
Registers
Note
1:
Not a physical register. See Section 4.8
FIGURE 4-3:
PIC12C509, PIC12C509A, PIC12CR509A AND PIC12CE519 REGISTER FILE MAP
File Address
00h
01h
02h
03h
04h
05h
06h
07h
1Fh
INDF(1)
TMR0
PCL
STATUS
FSR
OSCCAL
GPIO
0Fh
10h
Bank 0
Bank 1
3Fh
30h
20h
2Fh
General
Purpose
Registers
General
Purpose
Registers
General
Purpose
Registers
Addresses map
back to
addresses
in Bank 0.
Note
1:
Not a physical register. See Section 4.8
FSR<6:5>
00
01
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