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參數(shù)資料
| 型號(hào)： | PI90LV02TX |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | SOTinyTM LVDS High-Speed Differential Line Receiver |
| 中文描述： | SOTinyTM LVDS高速差分線路接收器 |
| 文件頁(yè)數(shù)： | 7/9頁(yè) |
| 文件大?。?/td> | 181K |
| 代理商： | PI90LV02TX |
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PI90LV02/PI90LVT02
SOTiny
TM
LVDS High-Speed Differential Line Receiver
7
PS8659B 09/28/04
Figure 4. Enable/Disable Time Test Circuit and Waveforms
V
O
C
L
10 pF
+
–
500
1.2 V
B
A
EN
EN
EN
R
OUT
R
OUT
Inputs
V
TEST
NOTE A:
All input pulses are supplied by a genertor having the following characteristics: tr or tf
≤
1ns,
pulse repetition rate (PRR) = 0.5 Mpps, pulse wide = 500 ±10ns. CL includes instrumentation
and fixture capacitance within 0.06m of the D.U.T.
NOTE B:
To verify input max signalling rate, the input signal transition time (tr/tf) should not
exceeds 1.25ns.
t
PZL
V
TEST
t
PZL
t
PLZ
2.5 V
1.4 V
V
OL
+0.5 V
V
OL
2 V
1.4 V
0.8 V
2.5 V
1 V
t
PZH
A
V
TEST
t
PZH
t
PHZ
V
OH
1.4 V
V
OH
–0.5 V
0 V
2 V
1.4 V
0.8 V
0 V
1.4 V
B
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