參數(shù)資料
型號(hào)： PI74VCX16374V
英文描述： 16-Bit D-Type Flip-Flop
中文描述： 16位D型觸發(fā)器
文件頁數(shù)： 7/7頁
文件大小： 223K
代理商： PI74VCX16374V
7
PS8323 09/14/98
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PI74VCX16240
Test Circuits and Switching Waveforms
Parameter Measurement Information (V
DD
= 1.8V - 3.6V)
Setup, Hold, and Release Timing
Pulse Width
Switch Position
Propagaton Delay
Enable Disable Timing
Notes:
A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions
such that the output is LOW except when disabled by
the output control.
Waveform 2 is for an output with internal conditions
such that the output is HIGH except when disabled by
the output control.
C. All input pulses are supplied by generators having the
following characteristics: PRR
≤
10 MHz, Z
O
= 50
,
t
r
≤
2ns, t
f
≤
2ns,
measured from 10% to 90%, unless
otherwise specified.
D. The outputs are measured one at a time with one
transition per measurement.
Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
Output
Control
(Active LOW)
Output
Waveform 2
S1 at GND
(see Note B)
t
PZL
t
PLZ
V
DD
0V
V
DD
V
OL
0V
Output
Waveform 1
S1 at 2xV
DD
(see Note B)
+0.15V
-0.15VV
OH
V
DD
V
DD/2
t
PHZ
t
PZH
V
DD/2
V
DD
/2
C
L
R
1
500
50pF
3
From Output
Under Test
GND
2 x V
DD
Open
(See Note A)
R
L
500
Low-High-Low
Pulse
t
W
High-Low-High
Pulse
V
DD
0V
V
DD
0V
V
DD/2
V
DD/2
Input
Opposite Phase
Input Transition
t
PLH
t
PHL
t
PLH
t
PHL
V
DD
0V
V
DD
V
OL
V
DD
V
DD/2
0V
Output
V
DD/2
V
DD/2
Data
Input
t
H
V
DD
V
DD/2
t
SU
0V
Timing
Input
V
DD
V
DD/2
0V
t
T
1
S
t
d
p
n
e
p
O
t
Z
L
P
/
t
L
Z
P
x
2
V
D
D
t
Z
H
P
/
t
H
Z
P
D
N
G
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